# US 10,481,957 B2 · Processor and task processing method therefor, and storage medium

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- Number: US 10,481,957 B2
- Document ID: US10481957B2
- Status: Granted
- Kind: B2
- Application number: 15/763,996
- Filed: 2016-07-01
- Published: 2018-09-27
- Granted: 2019-11-19
- Earliest claimed: 2015-09-28
- Assignees: Sanechips Technology Co., Ltd.
- Applicants: Sanechips Technology Co., Ltd.
- Inventors: Bo Wen; Qingxin Cao
- Web page: https://patentgrep.com/patent/US10481957B2

## CPC

- G06F 9/52: Program synchronisation; Mutual exclusion, e.g. by means of semaphores
- G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}
- G06F 9/30087: {Synchronisation or serialisation instructions}
- G06F 9/30116: {Shadow registers, e.g. coupled registers, not forming part of the register space}
- G06F 9/3824: {Operand accessing}
- G06F 9/3828: {with global bypass, e.g. between pipelines, between clusters}
- G06F 9/3836: {Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution}
- G06F 9/3889: {controlled by multiple instructions, e.g. MIMD, decoupled access or execute}
- G06F 9/4881: {Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A processor and a task processing method therefor, and a storage medium. The method comprises: a scalar calculation module executing parameter calculation of a current task, and storing a parameter obtained through calculation in a PBUF; when the parameter calculation of the current task is completed, executing a first instruction or second instruction for inter-core synchronization, and storing the first instruction or the second instruction in the PBUF (301); a vector calculation module reading the parameter from the PBUF, storing the read parameter in a shadow register; when the first instruction or the second instruction is read from the PBUF, storing all the modified parameters in the shadow register in a work register within a period (302); and the vector calculation module executing vector calculation of the current task according to the parameter in the work register (303).

## Claims

### Claim 1

A task processing method for a processor, comprising:
executing, by a scalar calculation module, parameter calculation for a present task, storing parameters obtained by calculation into a Parameter Buffer (PBUF), when the parameter calculation for the present task is completed, executing a first instruction or a second instruction configured for inter-core synchronization, and storing the first instruction or the second instruction into the PBUF;
reading, by a vector calculation module, the parameters out from the PBUF, storing the read parameters into a shadow register, and when the first instruction or the second instruction is read out from the PBUF, storing all modified parameters in the shadow register into a work register within one cycle; and
executing, by the vector calculation module, vector calculation for the present task according to the parameters in the work register.

### Claim 2 (depends on 1)

The task processing method for the processor according to claim 1, wherein storing all the modified parameters in the shadow register into the work register within one cycle when the first instruction or the second instruction is read out from the PBUF comprises:
when the first instruction or the second instruction is read out from the PBUF and the vector calculation module is in an idle state or executing a third instruction, storing all the modified parameters in the shadow register into the work register within one cycle.

### Claim 3 (depends on 1)

The task processing method for the processor according to claim 1, further comprising:
after vector calculation for the present task is completed, executing, by the vector calculation module, a third instruction configured for updating parameters of a next task.

### Claim 4 (depends on 1)

The task processing method for the processor according to claim 1, wherein the first instruction executed by the scalar calculation module is configured to notify the vector calculation module that parameter calculation for the present task is completed; and
the first instruction contains indication information indicating an address of a called subprogram of the vector calculation module.

### Claim 5 (depends on 1)

The task processing method for the processor according to claim 1, wherein
the second instruction executed by the scalar calculation module is configured to notify the vector calculation module that parameter calculation for the present task is completed; and
the second instruction is configured to indicate the vector calculation module to execute programs according to a preset sequence.

### Claim 6 (depends on 1)

The task processing method for the processor according to claim 1, further comprising:
after the first instruction or the second instruction is stored into the PBUF, calculating, by the scalar calculation module, parameters of a next task.

### Claim 7

A processor, comprising: a scalar calculation module, a vector calculation module and a Parameter Buffer (PBUF), wherein the vector calculation module comprises: a shadow register and a work register;
the scalar calculation module is configured to execute parameter calculation for a present task, store parameters obtained by calculation into the PBUF, when parameter calculation for the present task is completed, execute a first instruction or a second instruction configured for inter-core synchronization and store the first instruction or the second instruction into the PBUF;
the shadow register is configured to read the parameters out from the PBUF and store the read parameters;
the work register is configured to store all modified parameters in the shadow register within one cycle when the first instruction or the second instruction is read out from the PBUF; and
the vector calculation module is configured to execute vector calculation for the present task according to the parameters in the work register.

### Claim 8 (depends on 7)

The processor according to claim 7, wherein the work register is further configured to, when the first instruction or the second instruction is read out from the PBUF and the vector calculation module is in an idle state or executing a third instruction, store all the modified parameters in the shadow register within one cycle.

### Claim 9 (depends on 7)

The processor according to claim 7, wherein the vector calculation module is further configured to, after vector calculation for the present task is completed, execute a third instruction configured for updating parameters of a next task.

### Claim 10 (depends on 7)

The processor according to claim 7, wherein the first instruction executed by the scalar calculation module is configured to notify the vector calculation module that parameter calculation for the present task is completed; and
the first instruction contains indication information indicating an address of a called subprogram of the vector calculation module.

### Claim 11 (depends on 7)

The processor according to claim 7, wherein the second instruction executed by the scalar calculation module is configured to notify the vector calculation module that parameter calculation for the present task is completed; and
the second instruction is configured to indicate the vector calculation module to execute programs according to a preset sequence.

### Claim 12 (depends on 7)

The processor according to claim 7, wherein the scalar calculation module is further configured to, after the first instruction or the second instruction is stored into the PBUF, calculate parameters of a next task.

### Claim 13

A non-transitory computer-readable storage medium, the storage medium storing computer programs that, when executed by a processor, causes the processor to execute a task processing method for the processor, the task processing method for the processor comprising:
executing parameter calculation for a present task, storing parameters obtained by calculation into a Parameter Buffer (PBUF), when the parameter calculation for the present task is completed, executing a first instruction or a second instruction configured for inter-core synchronization, and storing the first instruction or the second instruction into the PBUF;
reading the parameters out from the PBUF, storing the read parameters into a shadow register, and when the first instruction or the second instruction is read out from the PBUF, storing all modified parameters in the shadow register into a work register within one cycle; and
executing vector calculation for the present task according to the parameters in the work register.

### Claim 14 (depends on 13)

The non-transitory computer-readable storage medium according to claim 13, wherein storing all the modified parameters in the shadow register into the work register within one cycle when the first instruction or the second instruction is read out from the PBUF comprises:
when the first instruction or the second instruction is read out from the PBUF and a vector calculation module is in an idle state or executing a third instruction, storing all the modified parameters in the shadow register into the work register within one cycle.

### Claim 15 (depends on 13)

The non-transitory computer-readable storage medium according to claim 13, further comprising:
after vector calculation for the present task is completed, executing a third instruction configured for updating parameters of a next task.

### Claim 16 (depends on 13)

The non-transitory computer-readable storage medium according to claim 13, wherein the first instruction is configured to notify a vector calculation module that parameter calculation for the present task is completed; and
the first instruction contains indication information indicating an address of a called subprogram of the vector calculation module.

### Claim 17 (depends on 13)

The non-transitory computer-readable storage medium according to claim 13, wherein the second instruction is configured to notify a vector calculation module that parameter calculation for the present task is completed; and
the second instruction is configured to indicate the vector calculation module to execute programs according to a preset sequence.

### Claim 18 (depends on 13)

The non-transitory computer-readable storage medium according to claim 13, the method further comprising:
after the first instruction or the second instruction is stored into the PBUF, calculating parameters of a next task.
