# US 10,481,946 B2 · Information-processing device, processing method thereof, and input/output device

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- Number: US 10,481,946 B2
- Document ID: US10481946B2
- Status: Granted
- Kind: B2
- Application number: 15/124,883
- Filed: 2014-05-12
- Published: 2017-01-19
- Granted: 2019-11-19
- Earliest claimed: 2014-05-12
- Assignees: Hitachi, Ltd.
- Applicants: Hitachi, Ltd.
- Inventors: Katsuto Sato; Yuki Kondo
- Web page: https://patentgrep.com/patent/US10481946B2

## CPC

- G06F 9/48: Program initiating; Program switching, e.g. by interrupt
- G06F 9/4837: {time dependent}
- G06F 13/14: Handling requests for interconnection or transfer
- G06F 13/22: using successive scanning, e.g. polling (G06F13/24 takes precedence)
- G06F 13/24: using interrupt (G06F13/32 takes precedence)
- G06F 13/372: using a time-dependent priority, e.g. individually loaded time counters or time slot
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An information processing device for reducing the number of times of interrupt notification for notifying completion of execution of input/output instruction and lightening a load of interrupt processing is described. The information processing device prescribes that a driver checks a completion state of a preceding input/output instruction after issuance of the input/output instruction. An issuing timing of the input/output instruction is considered to be a polling timing for checking the completion state of the preceding input/output instruction. Before the input/output device transmits interrupt notification to a CPU, the input/output device sets a timer to stand by for a prescribed time. A processing unit which resets the timer and extends the standby time by a prescribed time in a case where notification that a subsequent input/output instruction is issued arrives from a driver to the input/output device during the time is additionally provided to the input/output device.

## Claims

### Claim 1

An information processing device having a processor, a memory, and an input/output device which receives an a processing starting instruction from the processor and performs processing,
wherein the processor is configured to check whether a preceding processing instruction is completed by an interrupt signal from the input/output device, and dispatch the processing start instruction if a value of the preceding processing instruction which has not been completed is less than a predetermined number, wherein the input/output device is configured to:
transmit the interrupt signal, as notification of completion of processing, to the processor;
standby for a certain period of time before a transmission of the interrupt signal as notification of completion of the processing to the processor; and
extend the certain period of time of standby for transmission of the interrupt signal to the processor when receiving the processing starting instruction from the processor during the standby for the certain period of time,
wherein the input/output device detects a plurality of the processing starting instructions in response to instructions from a plurality of the processors, and
wherein, in a case where the processing starting instruction is detected, the processor further extends the certain period of time until the notification to the processor is performed.

### Claim 2 (depends on 1)

The information-processing device according to claim 1, wherein the processing starting instruction from the processor is detected by writing in a register inside the input/output device.

### Claim 3 (depends on 2)

The information-processing device according to claim 2, wherein the processor is further configured to transmit the interrupt signal together with identification information identifying a plurality of processing completion queues provided in the memory.

### Claim 4 (depends on 1)

The information-processing device according to claim 1, wherein, when a signal notifying that the processing completion notification from the processor is processed is detected, the processor further extends the certain period of time until the notification to the processor is performed.

### Claim 5

A processing method of an information processing device having a processor, a memory, and an input/output device which receives a processing starting instruction from the processor, comprising:
checking whether a preceding processing instruction is completed by an interrupt signal from the input/output device, and dispatching the processing start instruction if a value of the preceding processing instruction which has not been completed is less than a predetermined number;
transmitting, by the processor, an the interrupt signal as notification of completion of the processing to the processor after a standby of a certain period of time before a transmission of the interrupt signal as a notification of the completion of processing; and
further extending the certain period of time of standby for transmission of the interrupt signal to the processor when the processing starting instruction is received from the processor during the standby for the certain period of time,
wherein the input/output device receives a plurality of instructions of processing from a plurality of cores of the processor, and the input/output device detects a plurality of the processing starting instructions in response to the plurality of the instructions of processing, and
wherein, in a case where the processing starting instruction of the plurality of the processing starting instructions is detected, the certain period of time until the notification to the processor is performed is further extended.

### Claim 6 (depends on 5)

The processing method of the information processing device according to claim 5, wherein the processing starting instruction from the processor is detected by writing in a register inside the input/output device.

### Claim 7 (depends on 6)

The processing method of the information processing device according to claim 6, wherein the interrupt signal together with identification information of identifying a plurality of processing completion queues provided in the memory is transmitted.

### Claim 8 (depends on 5)

The processing method of the information processing device according to claim 5, wherein, when the interrupt signal notifying the processing completion from the processor is detected, the certain period of time is further extended.

### Claim 9

An input/output device which receives a processing starting instruction from a processor with a memory, the input/output device configured to:
transmit an interrupt signal as notification of completion of processing received from the processor;
standby for a certain period of time before transmission of the interrupt signal as notification completion of the processing to the first processor; and
further extends the certain period of time of standby for transmission of the interrupt signal to the processor when receiving the processing starting instruction from the processor during the standby for the certain period of time,
wherein the input/output device detects a plurality of the processing starting instructions in response to instructions from a plurality of the processors, and
wherein, in a case where the processing starting instruction is detected, the processor further extends the certain period of time until the notification to the processor is performed.

### Claim 10 (depends on 9)

The input/output device according to claim 9, wherein the processing starting instruction from the processor is detected by writing in a register inside the input/output device.
