# US 10,481,915 B2 · Split store data queue design for an out-of-order processor

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- Number: US 10,481,915 B2
- Document ID: US10481915B2
- Status: Granted
- Kind: B2
- Application number: 15/709,740
- Filed: 2017-09-20
- Published: 2019-03-21
- Granted: 2019-11-19
- Earliest claimed: 2017-09-20
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Bryan J. Lloyd; Balaram Sinharoy
- Web page: https://patentgrep.com/patent/US10481915B2

## CPC

- G06F 9/30189: {according to execution mode, e.g. mode flag}
- G06F 9/3856: {Reordering of instructions, e.g. using queues or age tags}
- G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}
- G06F 9/30043: {LOAD or STORE instructions; Clear instruction}
- G06F 9/3824: {Operand accessing}
- G06F 9/3851: {from multiple instruction streams, e.g. multistreaming}
- G06F 12/0848: {Partitioned cache, e.g. separate instruction and operand caches}
- G06F 12/0875: with dedicated cache, e.g. instruction or stack
- G06F 2212/282: Partitioned cache
- G06F 2212/452: Instruction code
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Provided are methods, systems, and computer program products to implementing a split store data queue for an out-of-order (OoO) processor. A non-limiting example of the computer-implemented method includes detecting, by the OoO processor, a mode of the OoO processor. The method further includes partitioning, by the OoO processor, a first store data queue (SDQ) and a second SDQ based at least in part on the mode of the OoO processor. The method further includes receiving, by the OoO processor, a vector operand. The method further includes storing, by the OoO processor, the vector operand in at least one of the first SDQ and the second SDQ based at least in part on the mode of the OoO processor.

## Claims

### Claim 1

A computer-implemented method for a split store data queue for an out-of-order (OoO) processor, the method comprising:
detecting, by the OoO processor, a mode of the OoO processor;
partitioning, by the OoO processor, a first store data queue (SDQ) and a second SDQ based at least in part on the mode of the OoO processor;
receiving, by the OoO processor, a vector operand; and
storing, by the OoO processor, the vector operand in at least one of the first SDQ and the second SDQ based at least in part on the mode of the OoO processor,
wherein, responsive to the mode of the OoO processor being detected to be a single thread mode, the first SDQ is partitioned to store first entries and the second SDQ is partitioned to store copies of the first entries.

### Claim 2 (depends on 1)

The computer-implemented method of claim 1, wherein the mode of the OoO processor is one of a single thread mode and a multithread mode.

### Claim 3 (depends on 2)

The computer-implemented method of claim 2, wherein the multithread mode is a symmetric multiprocessing 2 (SMP2) mode.

### Claim 4 (depends on 3)

The computer-implemented method of claim 3, wherein the first SDQ is partitioned to store first entries, wherein the second SDQ is partitioned to store second entries, and wherein the first entries differ from the second entries.

### Claim 5 (depends on 2)

The computer-implemented method of claim 2, wherein the multithread mode is a symmetric multiprocessing 4 (SMP4) mode.

### Claim 6 (depends on 5)

The computer-implemented method of claim 5, wherein the first SDQ is partitioned to store first entries, wherein a first portion of the first entries of the first SDQ are allocated to a first thread and wherein a second portion of the first entries of the first SDQ are allocated to a second thread.

### Claim 7 (depends on 6)

The computer-implemented method of claim 6, wherein the second SDQ is partitioned to store second entries, wherein a first portion of the second entries of the second SDQ are allocated to a third thread and wherein a second portion of the second entries of the second SDQ are allocated to a fourth thread.

### Claim 8 (depends on 1)

The computer-implemented method of claim 1, wherein the first SDQ is a circular queue, and wherein the second SDQ is a circular queue.

### Claim 9

A system for wide vector execution for an out-of-order processor, the system comprising:
a memory having computer readable instructions; and
the out-of-order processor for executing the computer readable instructions, the computer readable instructions controlling the out-of-order processor to perform operations comprising:
detecting, by the OoO processor, a mode of the OoO processor;
partitioning, by the OoO processor, a first store data queue (SDQ) and a second SDQ based at least in part on the mode of the OoO processor;
receiving, by the OoO processor, a vector operand; and
storing, by the OoO processor, the vector operand in at least one of the first SDQ and the second SDQ based at least in part on the mode of the OoO processor,
wherein, responsive to the mode of the OoO processor being detected to be a single thread mode, the first SDQ is partitioned to store first entries and the second SDQ is partitioned to store copies of the first entries.

### Claim 10 (depends on 9)

The system of claim 9, wherein the mode of the OoO processor is one of a single thread mode and a multithread mode.

### Claim 11 (depends on 10)

The system of claim 10, wherein the multithread mode is a symmetric multiprocessing 2 (SMP2) mode.

### Claim 12 (depends on 11)

The system of claim 11, wherein the first SDQ is partitioned to store first entries, wherein the second SDQ is partitioned to store second entries, and wherein the first entries differ from the second entries.

### Claim 13 (depends on 10)

The system of claim 10, wherein the multithread mode is a symmetric multiprocessing 4 (SMP4) mode.

### Claim 14 (depends on 13)

The system of claim 13, wherein the first SDQ is partitioned to store first entries, wherein a first portion of the first entries of the first SDQ are allocated to a first thread and wherein a second portion of the first entries of the first SDQ are allocated to a second thread.

### Claim 15 (depends on 14)

The system of claim 14, wherein the second SDQ is partitioned to store second entries, wherein a first portion of the second entries of the second SDQ are allocated to a third thread and wherein a second portion of the second entries of the second SDQ are allocated to a fourth thread.

### Claim 16 (depends on 9)

The system of claim 9, wherein the first SDQ is a circular queue, and wherein the second SDQ is a circular queue.

### Claim 17

A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by an out-of-order processor to cause the out-of-order processor to perform operations comprising:
detecting, by the OoO processor, a mode of the OoO processor;
partitioning, by the OoO processor, a first store data queue (SDQ) and a second SDQ based at least in part on the mode of the OoO processor;
receiving, by the OoO processor, a vector operand; and
storing, by the OoO processor, the vector operand in at least one of the first SDQ and the second SDQ based at least in part on the mode of the OoO processor,
wherein, responsive to the mode of the OoO processor being detected to be a single thread mode, the first SDQ is partitioned to store first entries and the second SDQ is partitioned to store copies of the first entries.
