# US 10,481,888 B2 · Method for managing an architecture and associated architecture > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,481,888 B2 - Document ID: US10481888B2 - Status: Granted - Kind: B2 - Application number: 14/951,963 - Filed: 2015-11-25 - Published: 2016-06-02 - Granted: 2019-11-19 - Earliest claimed: 2014-11-27 - Assignees: Thales - Applicants: Thales - Inventors: Eric Saliba; Emmanuel Gureghian; Cédric Nortier - Web page: https://patentgrep.com/patent/US10481888B2 ## CPC - G06F 8/61: Installation - G06F 9/455: Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines - G06F 9/5077: {Logical partitioning of resources; Management or configuration of virtualized resources (specific details on emulation or internal functioning of virtual machines G06F9/455)} - G06F 21/53: by executing in a restricted environment, e.g. sandbox or secure virtual machine - G06F 2221/2141: Access rights, e.g. capability lists, access control lists, access tables, access matrices - G06F 2221/2149: Restricted operating environment - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract The invention relates to a method for managing an architecture, wherein the architecture comprises a main platform including a plurality of partitions for executing software, and at least one secondary platform. The method further comprises at least one step of associating each partition of the main platform with at least one processing member by installing, for each partition and each processing member, a driver specific to the relevant partition, the driver ensuring a secured link between the relevant partition and the operating member(s) with which the partition is associated. ## Claims ### Claim 1 A method for managing an architecture, the architecture comprising: a main platform comprising a plurality of partitions executing software, wherein the main platform is a programmable microprocessor, and at least one secondary platform each secondary platform comprising a plurality of processing members, said at least one secondary platform being a programmable microprocessor, and each processing member being able to apply secured processing operations for the account of at least one partition and each processing member being physically partitioned relatively to the other processing members, wherein the main platform and said at least one secondary platform at least share a communication interface able to ensure exchange of data in cut-off between the main platform and said at least one secondary platform, wherein each partition comprises a first transceiver element and each processing member comprises a second transceiver element, the method comprising at least: associating each partition of the main platform with at least one processing member by installing, for each partition and each processing member, a driver specific to the relevant partition, the driver ensuring a secured link between the relevant partition and the processing member with which the partition is associated, and providing encrypted communication between the first transceiver element and the second transceiver element over each installed secured link. ### Claim 2 (depends on 1) The method according to claim 1, wherein the method further comprises: partitioning of the main platform into a plurality of partitions under the control of a hypervisor. ### Claim 3 (depends on 1) The method according to claim 1, wherein the method further comprises: partitioning of the secondary platform into a plurality of processing members. ### Claim 4 (depends on 1) The method according to claim 1, wherein each partition is associated with one or several processing members, said processing members not being associated with other partitions. ### Claim 5 (depends on 1) The method according to claim 1, wherein the main platform is a programmable microprocessor. ### Claim 6 (depends on 1) The method according to claim 1, wherein the secondary platform is a programmable logic circuit. ### Claim 7 A secure system comprising: a main platform, wherein the main platform is a programmable microprocessor, the main platform including: a plurality of partitions for executing software; and a plurality of first transceiver elements, each first transceiver element being associated with one of the partitions; at least one secondary platform, said at least one secondary platform being a programmable microprocessor, wherein the main platform and said at least one secondary platform at least share a communication interface able to ensure exchange of data in cut-off between the main platform and said at least one secondary platform, and wherein each secondary platform comprises: a plurality of processing members; and a plurality of second transceiver elements, each second transceiver element being associated with one of the processing members, and a specific driver disposed on each partition, wherein each processing member applies processing operations secured for the account of at least one partition, wherein each processing member being physically partitioned relatively to the other processing members, wherein each driver ensuring a secured link between the partition and at least one processing member with which the partition is associated, and wherein the secured link provides encrypted communication between the first transceiver element associated with the partition and the second transceiver element associated with the at least one processing member. ### Claim 8 (depends on 7) The system according to claim 7, wherein each partition is able to apply a man-machine interface allowing a user to access a service. ### Claim 9 A method for managing an architecture, the architecture comprising: a main platform comprising a plurality of partitions executing software, wherein the main platform is a programmable microprocessor, and at least one secondary platform, said at least one secondary platform being a programmable logic circuit, and each secondary platform comprising a plurality of processing members, each processing member being able to apply secured processing operations for the account of at least one partition and each processing member being physically partitioned relatively to the other processing members, wherein the main platform and said at least one secondary platform at least share a communication interface able to ensure exchange of data in cut-off between the main platform and said at least one secondary platform, wherein each partition comprises a first transceiver element and each processing member comprises a second transceiver element, and wherein each partition is associated with one or several processing members, said processing members not being associated with other partitions, the method comprising at least: associating each partition of the main platform with at least one processing member by installing, for each partition and each processing member, a driver specific to the relevant partition, the driver ensuring a secured link between the relevant partition and the processing member with which the partition is associated, and providing encrypted communication between the first transceiver element and the second transceiver element over each installed secured link.