# US 10,481,834 B2 · Erasure code data protection across multiple NVME over fabrics storage devices

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- Number: US 10,481,834 B2
- Document ID: US10481834B2
- Status: Granted
- Kind: B2
- Application number: 15/944,594
- Filed: 2018-04-03
- Published: 2019-07-25
- Granted: 2019-11-19
- Earliest claimed: 2018-01-24
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sompong Paul Olarig; Vikas K. Sinha; Fred Worley; Ramdas P. Kachare; Stephen G. Fischer
- Web page: https://patentgrep.com/patent/US10481834B2

## CPC

- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 11/1076: {Parity data used in redundant arrays of independent storages, e.g. in RAID systems}
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0689: {Disk arrays, e.g. RAID, JBOD}
- G06F 11/08: Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F 12/0806: Multiuser, multiprocessor or multiprocessing cache systems
- G06F 12/0868: Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
- G06F 12/123: with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
- G06F 13/4221: {being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus}
- G06F 2212/1016: Performance improvement
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/214: Solid state disk
- G06F 2212/222: Non-volatile memory
- G06F 2212/262: configured as RAID
- G06F 2212/31: Providing disk cache in a specific location of a storage system
- G06F 2212/312: In storage controller
- G06F 2213/0026: PCI express
- H04L 49/25: Routing or path finding in a switch fabric
- H04L 49/351: for local area network [LAN], e.g. Ethernet switches
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A system and method for providing erasure code data protection for an array of solid state drives. The solid state drives are connected to an Ethernet switch which includes a RAID control circuit, or a state machine, to process read or write commands that may be received from a remote host. The RAID control circuit, if present, uses a low-latency cache to execute write commands, and the state machine, if present, uses a local central processing unit, which in turn uses a memory as a low-latency cache, to similar effect.

## Claims

### Claim 1

A system for providing protected data storage, the system comprising:
an Ethernet switch;
a plurality of Ethernet storage devices, one or more of the Ethernet storage devices being connected to the Ethernet switch;
a local central processing unit, connected to the Ethernet switch,
wherein the Ethernet switch comprises:
a media access control circuit;
a virtual local area network circuit;
a layer 2 processing circuit;
a layer 3 processing circuit; and
a RAID control circuit, the RAID control circuit being configured to control the Ethernet storage devices as a redundant array of independent disks,
wherein the RAID control circuit is connected to:
the media access control circuit;
the virtual local area network circuit;
the layer 2 processing circuit; and
the layer 3 processing circuit.

### Claim 2 (depends on 1)

The system of claim 1, further comprising a cache device connected to the RAID control circuit.

### Claim 3 (depends on 2)

The system of claim 2, wherein the RAID control circuit is configured, upon receipt of a write command comprising a write address, to:
determine whether data corresponding to the write address are stored in the cache device; and
when data corresponding to the write address are stored in the cache device, to modify the data stored in the cache device in accordance with the write command, and
when data corresponding to the write address are not stored in the cache device:
to allocate a space in the cache device,
to read data from one or more Ethernet storage devices of the plurality of Ethernet storage devices into the space, and to modify the data in the space in accordance with the write command.

### Claim 4 (depends on 2)

The system of claim 2, wherein the cache device has a latency lower than a latency of an Ethernet storage device of the plurality of Ethernet storage devices by at least a factor of 5.

### Claim 5 (depends on 2)

The system of claim 2, wherein the Ethernet switch comprises the cache device.

### Claim 6 (depends on 5)

The system of claim 5, wherein the cache device has a latency lower than a latency of an Ethernet storage device of the plurality of Ethernet storage devices by at least a factor of 5.

### Claim 7 (depends on 1)

The system of claim 1, wherein the Ethernet switch is on a single semiconductor die.

### Claim 8 (depends on 1)

The system of claim 1, wherein the local central processing unit is configured, at system initialization, to configure the Ethernet switch.

### Claim 9 (depends on 1)

The system of claim 1, wherein the Ethernet switch is configured to forward Ethernet packets, received at a host port of the system addressed to a storage Ethernet address of the system, to the RAID control circuit.

### Claim 10 (depends on 1)

The system of claim 1, wherein the Ethernet switch is configured to disregard Ethernet packets received at a host port of the system addressed to an Ethernet address of an Ethernet storage device of the plurality of Ethernet storage devices.

### Claim 11 (depends on 1)

The system of claim 1, further comprising a peripheral component interconnect express (PCIe) switch, connected to one or more of the plurality of Ethernet storage devices and to the local central processing unit.

### Claim 12 (depends on 11)

The system of claim 11, further comprising a baseboard management controller, connected to the PCIe switch.

### Claim 13

A system for providing protected data storage, the system comprising:
an Ethernet switch;
a plurality of Ethernet storage devices, one or more of the Ethernet storage devices being connected to the Ethernet switch;
a local central processing unit, connected to the Ethernet switch,
wherein the Ethernet switch comprises:
a media access control circuit;
a virtual local area network circuit;
a layer 2 processing circuit;
a layer 3 processing circuit; and
a state machine,
wherein the state machine is connected to:
the media access control circuit;
the virtual local area network circuit;
the layer 2 processing circuit; and
the layer 3 processing circuit, and
wherein the state machine and the local central processing unit are configured to control the Ethernet storage devices as a redundant array of independent disks.

### Claim 14 (depends on 13)

The system of claim 13, further comprising a memory connected to the local central processing unit.

### Claim 15 (depends on 14)

The system of claim 14, wherein the state machine and the local central processing unit are configured, upon receipt of a write command comprising a write address, to:
determine whether data corresponding to the write address are stored in the memory; and
when data corresponding to the write address are stored in the memory, to modify the data stored in the memory in accordance with the write command, and
when data corresponding to the write address are not stored in the memory:
to allocate a space in the memory,
to read data from one or more Ethernet storage devices of the plurality of Ethernet storage devices into the space, and to modify the data in the space in accordance with the write command.

### Claim 16 (depends on 14)

The system of claim 14, wherein the memory has a latency lower than a latency of an Ethernet storage device of the plurality of Ethernet storage devices by at least a factor of 5.

### Claim 17 (depends on 13)

The system of claim 13, wherein the Ethernet switch is on a single semiconductor die.

### Claim 18 (depends on 13)

The system of claim 13, further comprising a peripheral component interconnect express (PCIe) switch, connected to one or more of the plurality of Ethernet storage devices and to the local central processing unit.

### Claim 19 (depends on 18)

The system of claim 18, further comprising a baseboard management controller, connected to the PCIe switch.

### Claim 20 (depends on 13)

The system of claim 13, wherein the state machine includes fewer than 200,000 gates.

### Claim 21

A method for operating a storage system, the storage system comprising:
an Ethernet switch;
a plurality of Ethernet storage devices, one or more of the Ethernet storage devices being connected to the Ethernet switch;
a local central processing unit, connected to the Ethernet switch,
wherein the Ethernet switch comprises:
a media access control circuit;
a virtual local area network circuit;
a layer 2 processing circuit;
a layer 3 processing circuit; and
a RAID control circuit, the RAID control circuit being configured to control the Ethernet storage devices as a redundant array of independent disks,
wherein the RAID control circuit is connected to:
the media access control circuit;
the virtual local area network circuit;
the layer 2 processing circuit; and
the layer 3 processing circuit,
the storage system further comprising a cache device connected to the RAID control circuit,
the method comprising, upon receipt of a write command comprising a write address:
determining whether data corresponding to the write address are stored in the cache device; and
when data corresponding to the write address are stored in the cache device, modifying the data stored in the cache device in accordance with the write command, and
when data corresponding to the write address are not stored in the cache device:
allocating a space in the cache device,
reading data from one or more Ethernet storage devices of the plurality of Ethernet storage devices into the space, and modifying the data in the space in accordance with the write command.
