# US 10,481,445 B2 · Array substrate and fabrication method thereof, and display device

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- Number: US 10,481,445 B2
- Document ID: US10481445B2
- Status: Granted
- Kind: B2
- Application number: 15/758,142
- Filed: 2015-08-14
- Published: 2018-08-16
- Granted: 2019-11-19
- Earliest claimed: 2014-12-26
- Assignees: Boe Technology Group Co., Ltd.; Beijing Boe Optoelectronics Technology Co., Ltd.
- Applicants: Boe Technology Group Co., Ltd.; Beijing Boe Optoelectronics Technology Co., Ltd.
- Inventors: Lianjie Qu
- Web page: https://patentgrep.com/patent/US10481445B2

## CPC

- G02F 1/13439: {characterised by their electrical, optical, physical properties; materials therefor; method of making}
- G02F 1/133345: {Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence)}
- G02F 1/136209: {Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element}
- G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- G02F 1/134345: {Subdivided pixels, e.g. for grey scale or redundancy}
- G02F 1/13624: {having more than one switching element per pixel}
- G02F 2201/123: pixel
- G02F 2203/02: reflective
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

An array substrate, a fabrication method of the array substrate, and a display device including the array substrate are provided. The array substrate includes a first electrode (54) including a plurality of first sub-electrodes, a second electrode (3) including a plurality of second sub-electrodes, and an insulating layer (6) disposed between the first electrode (54) and the second electrode (3). A plurality of via holes (61) are formed in the insulating layer (6), and the plurality of the second sub-electrodes are electrically connected to the plurality of the first sub-electrodes correspondingly through the plurality of the via holes (61). The array substrate further includes a light compensating structure (4) disposed under an uneven portion of the insulating layer (6) to locally improve an exposure efficiency in a photolithographic process for forming the second electrode (3).

## Claims

### Claim 1

An array substrate, comprising:
a first electrode including a plurality of first sub-electrodes;
a second electrode including a plurality of second sub-electrodes; and
an insulating layer disposed between the first electrode and the second electrode, wherein:
a plurality of via holes is formed in the insulating layer, and
the plurality of the second sub-electrodes is electrically connected to the plurality of the first sub-electrodes correspondingly through the plurality of the via holes; and
a light compensating structure disposed under an uneven portion of the insulating layer to locally improve an exposure efficiency in a photolithographic process for forming the second electrode, and the light compensating structure includes a protrusion structure having a thickness to protrude the uneven portion of the insulating layer in a direction close to the second electrode.

### Claim 2 (depends on 1)

The array substrate of claim 1, wherein the light compensating structure is made of an opaque and reflective material.

### Claim 3 (depends on 1)

The array substrate of claim 1, wherein:
the first electrode includes a pixel electrode,
the second electrode includes a drain electrode of a thin film transistor, and
the light compensating structure and a gate electrode of the thin film transistor are formed of a same material in a single patterning process.

### Claim 4 (depends on 1)

The array substrate of claim 1, wherein the insulating layer is made of a resin material.

### Claim 5 (depends on 1)

The array substrate of claim 1, wherein the insulating layer has a thickness of about 1.5 μm to about 5 μm.

### Claim 6 (depends on 1)

The array substrate of claim 1, wherein the light compensating structure is made of one or a combination of tungsten, molybdenum niobium alloy, aluminum, aluminum neodymium alloy, titanium, and copper.

### Claim 7 (depends on 1)

The array substrate of claim 1, wherein the light compensating structure has a shape and a size matching with a shape and a size of a light exposure region in the photolithographic process for forming the second electrode.

### Claim 8 (depends on 1)

The array substrate of claim 1, wherein the light compensating structure is square-shaped.

### Claim 9 (depends on 1)

The array substrate of claim 1, wherein the light compensating structure is electrically insulated from the first electrode and the second electrode.

### Claim 10 (depends on 1)

The substrate of claim 1, further including:
a display region, and
a non-display region surrounding the display region,
wherein:
gate lines and data lines are configured in the display region and are crossly configured to define pixel cells;
at least one thin film transistor is configured in each pixel cell;
the first sub-electrode is a drain electrode of the thin film transistor;
a via hole is configured in the insulating layer corresponding to each drain electrode;
the second sub-electrode is a pixel electrode configured over the insulating layer; and
the light compensating structure, disposed under the uneven portion of the insulating layer to locally improve the exposure efficiency, covers at least a surrounding area of the via hole in the insulating layer.

### Claim 11 (depends on 10)

The array substrate of claim 10, wherein:
the at least one thin film transistor includes two thin film transistors inversely configured in each pixel cell; and
the light compensating structure is configured under the uneven portion of the insulating layer between two adjacent via holes corresponding to two adjacent drain electrodes of the two thin film transistors.

### Claim 12 (depends on 10)

The array substrate of claim 10, wherein:
the at least one thin film transistor includes one thin film transistor configured in each pixel cell; and
the light compensating structure is disposed under the via hole and the surrounding area of the via hole of each pixel cell.

### Claim 13 (depends on 10)

The array substrate of claim 10, wherein:
the first electrode further includes a lead-out electrode configured in the non-display region;
the second electrode further includes a connection electrode positioned over the lead-out electrode;
the insulating layer is extended to the non-display region and is disposed between the lead-out electrode and the connection electrode;
the via hole is configured in the insulating layer adjacent to the corresponding lead-out electrode; and
the light compensating structure is positioned under the via holes and the surrounding area of the via holes in the insulating layer.

### Claim 14 (depends on 1)

A display device, comprising the array substrate according to claim 1.

### Claim 15

A method for forming an array substrate, comprising:
forming a first electrode including a plurality of first sub-electrodes;
forming a second electrode including a plurality of second sub-electrodes; and
forming an insulating layer between the first electrode and the second electrode;
forming a plurality of via holes in the insulating layer, wherein the plurality of the second sub-electrodes is electrically connected to the plurality of the first sub-electrodes correspondingly through the plurality of the via holes; and
forming a light compensating structure under an uneven portion of the insulating layer to locally improve an exposure efficiency in a photolithographic process for forming the second electrode,
wherein the light compensating structure includes a protrusion structure having a thickness to protrude the uneven portion of the insulating layer in a direction close to the second electrode.

### Claim 16 (depends on 15)

The method of claim 15, wherein the light compensating structure is made of an opaque and reflective material.

### Claim 17 (depends on 15)

The method of claim 15, wherein the light compensating structure includes a protrusion structure having a thickness to protrude the uneven portion of the insulating layer in a direction close to the second electrode.

### Claim 18 (depends on 15)

The method of claim 15, wherein:
the first electrode includes a pixel electrode,
the second electrode includes a drain electrode of a thin film transistor, and
the light compensating structure and a gate electrode of the thin film transistor are formed of a same material in a single patterning process.

### Claim 19 (depends on 15)

The method of claim 15, wherein the insulating layer is made of a resin material.