# US 10,481,177 B2 · Wafer inspection method

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- Number: US 10,481,177 B2
- Document ID: US10481177B2
- Status: Granted
- Kind: B2
- Application number: 15/524,925
- Filed: 2014-11-26
- Published: 2017-11-09
- Granted: 2019-11-19
- Earliest claimed: 2014-11-26
- Assignees: Tokyo Seimitsu Co., Ltd.
- Applicants: Tokyo Seimitsu Co., Ltd.
- Inventors: Yuichi Ozawa; Yasuhito Iguchi; Tetsuo Yoshida; Junzo Koshio
- Web page: https://patentgrep.com/patent/US10481177B2

## CPC

- G01R 1/07378: {using an intermediate adapter, e.g. space transformers (G01R1/07371 takes precedence)}
- G01R 31/2889: {Interfaces, e.g. between probe and tester (G01R31/31905 and G01R1/07364 take precedence)}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A wafer inspection method improving inspection accuracy and operation efficiency. A method for performing electrical inspection by bringing into contact with pads in chips on a wafer. A chuck step S1 for heating the wafer to an inspection temperature; a first position recognition step S2 for recognizing all the positions of the pads; a second position recognition step S3 for re-recognizing, before performing the electrical inspection, the position of the pads recognizing the positional shifts of the pads due to thermal expansion; and a correction step S4 for correcting contact positions with respect to the probes, the contact positions being corrected on the basis of pad positions, which have been re-recognized in the second position recognition step S3 on the basis of the pad positions recognized in the first position recognition step S2, and which have been updated.

## Claims

### Claim 1

A wafer inspection method which simultaneously brings a plurality of probes disposed on a probe card into contact with a plurality of pads being on chips on a wafer to perform an electrical inspection, comprising:
a chuck step of holding the wafer with a wafer chuck and heating the wafer to an inspection temperature;
a first position recognition step of recognizing all the positions of the pads on the basis of pad information of one arbitrary chip being in the wafer while thermal deformation is progressing;
a second position recognition step of re-recognizing the position of at least one but less than all of the pads to recognize positional shifts of the pads occurring due to thermal expansion caused by heat of the wafer chuck before electrical inspection is performed; and
a correction step of updating position information of the pads recognized in the second position recognition step on the basis of the positions of the pads in the first position recognition step to correct contact positions with respect to the probes.

### Claim 2 (depends on 1)

The wafer inspection method according to claim 1, wherein
the second position recognition step recognizes some of the pads in the chip.

### Claim 3 (depends on 1)

The wafer inspection method according to claim 1, wherein
the correction step corrects positional shifts from the pads of some of the chips caused by thermal expansion.

### Claim 4 (depends on 1)

The wafer inspection method according to claim 1, wherein detection of the positions and shapes of the pads performed in the first position recognition step and the second position recognition step is performed on the basis of information such as pad shapes, pad surface patterns, pad materials being in the arbitrary chip registered in an arithmetic device in advance.

### Claim 5

A wafer inspection method using probes disposed on a probe card contacting pads on chips on a wafer for performing an electrical inspection, comprising the steps of:
holding the wafer with a wafer chuck;
heating the wafer to begin approaching a predetermined temperature;
recognizing a first position of all of the pads on the chips on the wafer prior to reaching the predetermined temperature;
re-recognizing a second position of at least one but less than all of the pads on the chips on the wafer after reaching the predetermined temperature and thermal distortion has stopped;
calculating updated position information of the pads based on the first position of the pads and the second position of the at least one but less than all of the pads due to the thermal distortion; and
adjusting the position of the probes relative to the pads based on the updated position information of the pads to obtain a desired contact location of the probes on the pads;
whereby position recognition of the pads is capable of being started without waiting for the wafer to reach the predetermined temperature and thermal stability improving operation efficiency.