# US 10,480,077 B2 · PEALD apparatus to enable rapid cycling

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,480,077 B2
- Document ID: US10480077B2
- Status: Granted
- Kind: B2
- Application number: 14/186,880
- Filed: 2014-02-21
- Published: 2014-09-18
- Granted: 2019-11-19
- Earliest claimed: 2013-03-13
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Dale R. Du Bois; Jianhua Zhou; Juan Carlos Rocha-Alvarez
- Web page: https://patentgrep.com/patent/US10480077B2

## CPC

- C23C 16/509: using internal electrodes
- C23C 16/45536: {Use of plasma, radiation or electromagnetic fields}
- C23C 16/45544: {characterized by the apparatus}
- C23C 16/45591: {Fixed means, e.g. wings, baffles}
- C23C 16/4585: {Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds}
- H01J 37/3244: {Gas supply means}
- H01J 37/32449: {Gas control, e.g. control of the gas flow}
- H01J 37/32541: {Shape}
- H01J 37/32715: {Workpiece holder}
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)

## Abstract

Methods and apparatus for forming thin films are described. A semiconductor processing chamber includes a substrate support, an electrode opposite the substrate support, the electrode having a gas inlet in a peripheral region thereof, and an edge ring disposed around a peripheral region of the substrate support, the edge ring having a first barrier and a second barrier, wherein each of the first barrier and the second barrier mates with a recess in the electrode. The edge ring provides a gas flow path through a processing zone between the substrate support and the electrode that is substantially parallel to the upper surface of the substrate support. The electrode may be powered to enhance formation of a film on a substrate.

## Claims

### Claim 1

A semiconductor processing chamber, comprising:
a substrate support;
an electrode opposite the substrate support, the electrode having a gas inlet in a peripheral region thereof;
an edge ring disposed around a peripheral region of the substrate support, the edge ring having an outer first barrier extending at least partly around the edge ring, which is an unbroken barrier, and an inner second barrier extending at least partly around the edge ring, which is an intermittent barrier, wherein each of the first barrier and the second barrier mates with and enters into a respective recess in the electrode, and wherein the first barrier and the second barrier define an inlet channel; and
a seal member disposed in each of the recesses.

### Claim 2 (depends on 1)

The semiconductor processing chamber of claim 1, wherein the first barrier and the second barrier extend around the edge ring and a distance between the first barrier and the second barrier is substantially constant.

### Claim 3 (depends on 2)

The semiconductor processing chamber of claim 2, wherein the second barrier is located radially inward of the first barrier.

### Claim 4 (depends on 3)

The semiconductor processing chamber of claim 3, wherein the second barrier has intermittent openings formed therethrough.

### Claim 5 (depends on 1)

The semiconductor processing chamber of claim 1, further comprising a pumping plenum disposed in a side wall of the chamber proximate a processing position of the substrate support, and a liner separating the pumping plenum from the substrate support, wherein the liner has an opening located opposite the gas inlet of the electrode.

### Claim 6 (depends on 5)

The semiconductor processing chamber of claim 5, wherein the substrate support is movable between the processing position and a substrate handling position, and the liner has an extension that supports the edge ring spaced apart from the substrate support when the substrate support is at the substrate handling position.

### Claim 7 (depends on 6)

The semiconductor processing chamber of claim 6, wherein the first barrier and the second barrier extend around the edge ring, the second barrier is located radially inward of the first barrier, and the second barrier has at least one opening located substantially opposite the opening in the liner.

### Claim 8 (depends on 1)

The semiconductor processing chamber of claim 1, further comprising a source of RF power coupled to the electrode.

### Claim 9 (depends on 8)

The semiconductor processing chamber of claim 8, further comprising a gas manifold coupled to the gas inlet, the gas manifold comprising a plurality of high speed valves.

### Claim 10 (depends on 9)

The semiconductor processing chamber of claim 9, wherein the substrate support is movable between a processing position proximate the electrode and a substrate handling position, and a substrate passage between an upper surface of the substrate support and a lower surface of the electrode, when the substrate support is in the processing position, is about 2 mm to about 8 mm.

### Claim 11

A semiconductor processing chamber, comprising:
a substrate support;
an electrode opposite the substrate support, the electrode having a gas inlet in a peripheral region thereof;
an edge ring disposed around a peripheral region of the substrate support, the edge ring having an outer first barrier, which is an unbroken barrier, and an inner second barrier, which is an intermittent barrier, wherein each of the first barrier and the second barrier mates with and enters into a respective recess in the electrode, and the substrate support is movable between a processing position proximate the electrode and a substrate handling position; and
a seal disposed member in each of the recesses.

### Claim 12 (depends on 11)

The semiconductor processing chamber of claim 11, further comprising a pumping plenum disposed in a side wall of the chamber proximate the processing position of the substrate support, and a liner separating the pumping plenum from the substrate support, wherein the liner has an opening located opposite the gas inlet of the electrode.

### Claim 13 (depends on 12)

The semiconductor processing chamber of claim 12, wherein the second barrier has at least one opening proximate the gas inlet, and the substrate support and the electrode define a flow path from the at least one opening in the second barrier to the opening in the liner.

### Claim 14 (depends on 13)

The semiconductor processing chamber of claim 13, wherein the opening in the liner is located below an upper surface of the substrate support when the substrate support is located in the processing position.

### Claim 15 (depends on 14)

The semiconductor processing chamber of claim 14, further comprising a substrate passage formed in the side wall of the chamber, and the substrate passage is located below the pumping plenum.

### Claim 16

A semiconductor processing chamber, comprising:
a chamber body;
a chamber lid coupled to the chamber body, the chamber lid having a conductive lower surface coupled to a source of RF energy, a gas inlet in a peripheral region thereof, and two recesses in the lower surface and on opposite sides of the gas inlet, the chamber lid and chamber body defining an interior;
a substrate support disposed in the interior; and
an edge ring disposed on the substrate support at a peripheral region thereof, the edge ring enclosing a substrate contact area of the substrate support, wherein the edge ring mates with and enters into the two recesses, the edge ring has a port that fluidly couples the gas inlet to a channel between an outer first barrier, which is an unbroken barrier, and an inner second barrier, which is an intermittent barrier, of the edge ring, the second barrier is located radially inward of the first barrier, the second barrier has a plurality of openings that fluidly couple the channel to the chamber interior, and the channel has a depth that increases with distance from the port, wherein the substrate support, the lower surface of the chamber lid, and the edge ring define a minimum reaction volume.

### Claim 17 (depends on 16)

The semiconductor processing chamber of claim 16, further comprising a gas manifold coupled to the gas inlet, the gas manifold comprising a plurality of high speed valves.

### Claim 18 (depends on 17)

The semiconductor processing chamber of claim 17, further comprising a seal member in each of the two recesses.

### Claim 19 (depends on 1)

The semiconductor processing chamber of claim 1, further comprising an inlet channel defined by the first barrier and the second barrier, and subtending an angle of less than 140°, wherein the substrate support is movable between a processing position proximate the electrode and a substrate handling position, wherein the edge ring comprises a notch that mates with a corner of the substrate support when the substrate support is in the processing position.

### Claim 20 (depends on 16)

The semiconductor processing chamber of claim 16, wherein the minimum reaction volume is no more than about 225 mL.

### Claim 21

A semiconductor processing chamber, comprising:
a substrate support;
an electrode opposite the substrate support, the electrode comprising:
a gas inlet in a peripheral region thereof;
a pair of recesses on a surface facing the substrate support; and
a seal member disposed in each of the recesses; and
an edge ring disposed around a peripheral region of the substrate support, the edge ring comprising:
a notch that mates with a corner of the substrate support when the substrate support is in a processing position, the notch and the corner defining a contact point;
an outer first barrier, which is an unbroken barrier;
an inner second barrier, which is an intermittent barrier, wherein the first barrier and the second barrier mate with and enter into the pair of recesses in the electrode; and
an inlet channel defined by the first barrier and the second barrier, that registers with the gas inlet of the electrode and subtends an angle of less than 140°.
