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US 10,476,521 B2Granted
Ratio-metric self-capacitance-to-code convertor
AssigneeCypress Semiconductor Corporation
InventorAndriy Maharyta
Life of this patent
Estimating the term…
Abstract
A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a switch network, a sensor capacitor or modulation capacitor, and an integration capacitor may be coupled to a comparator to produce a data signal representative of the capacitance of the sensor capacitor of one of the charge transfer circuits. The data signal may be used to indicate a capacitance value of the self capacitance through conversion by a circuit.
Claims20
A capacitance-to-code converter comprising:
- a first charge transfer circuit comprising a sensor capacitor alternately coupled to a first voltage potential node and a first integration capacitor through a first switch network;
- a second charge transfer circuit comprising a modulation capacitor alternately coupled to a second voltage potential node and a second integration capacitor through a second switch network;
- a comparator circuit coupled to the first charge transfer circuit at the first integration capacitor and the second charge transfer circuit at the second integration capacitor, the comparator circuit configured to output a data signal;
- and
- a converter circuit coupled to the comparator circuit and configured to convert the data signal to a digital value representative of a capacitance of the sensor capacitor.
2 more elements
A system comprising:
- at least one electrode comprising a capacitance that is alterable by a proximity of a conductive object to the at least one electrode;
- and
- a capacitance measurement circuit comprising:
- a first charge transfer circuit coupled to the at least one electrode and a first integration capacitor, the first charge transfer circuit comprising a first switch network for alternately coupling the at least one electrode to a first voltage potential node and the first integration capacitor;
- a second charge transfer circuit comprising a modulation capacitor and a second integration capacitor, the second charge transfer circuit comprising a second switch network for alternately coupling the modulation capacitor to a second voltage potential node and the second integration capacitor;
- a comparator comprising a first input coupled to the first charge transfer circuit at the first integration capacitor and a second input coupled to the second charge transfer circuit at the second integration capacitor, the comparator configured to output a data signal;
- and
- a converter circuit coupled to the comparator and configured to convert the data signal to a digital value representative of a capacitance of the at least one electrode.
5 more elements
An apparatus comprising:
- a first switch network;
- a second switch network;
- a first voltage potential node;
- a first integration capacitor to accumulate a first charge through a plurality of first charge transfer operations by alternately coupling the first voltage potential node and the first integration capacitor to a sensor capacitor through the first switch network;
- a second voltage potential node;
- a second integration capacitor to accumulate a second charge through a plurality of second charge transfer operations by alternately coupling the second voltage potential node and the second integration capacitor to a modulation capacitor through the second switch network;
- a comparator to generate a data signal from a comparison of the first charge and the second charge;
- and
- a converter circuit coupled to the comparator, the converter circuit to convert the data signal to a digital value representative of a capacitance of the sensor capacitor.
6 more elements
Dependencies are inferred from the claim text.