Envelope tracking bias circuit

An envelope tracking (ET) bias circuit, comprising:

• an envelope detection circuit configured to detect an envelope of an input signal, and output an envelope signal based on the detected envelope of the input signal;
• an envelope amplifier circuit configured to differentially amplify the envelope signal in response to a first control signal and cancel a direct current (DC) offset of the envelope signal to output an amplified signal from which the DC offset is canceled;
• and
• an envelope output circuit configured to generate an ET bias current by selecting either one of a negative signal of the amplified signal and a positive signal of the amplified signal in response to a second control signal,
• wherein the envelope signal of the envelope detection circuit is a single envelope signal, and
• the envelope amplifier circuit comprises:
• a single/differential circuit configured to convert the single envelope signal into a differential envelope signal;
• an amplifier configured to differentially amplify the differential envelope signal from the single/differential circuit to output a differential amplified signal;
• and
• a DC offset cancelling circuit configured to provide the amplified signal from the amplifier to an input terminal of the amplifier to cancel the DC offset from the amplified signal output from the amplifier.

An envelope tracking (ET) bias circuit, comprising:

• an envelope detection circuit configured to detect an envelope from an input signal, and output an envelope signal based on the detected envelope;
• an envelope amplifier circuit configured to differentially amplify the envelope signal in response to a first control signal, and cancel a direct current (DC) offset of the envelope signal to output an amplified signal from which the DC offset is canceled;
• an envelope output circuit configured to generate an ET bias current by selecting either one of a negative signal of the amplified signal and a positive signal of the amplified signal in response to the second control signal;
• and
• a control circuit configured to generate the first control signal and the second control signal to control the envelope amplifier circuit and the envelope output circuit based on a characteristic parameter factor of a power amplifier,
• wherein the envelope output circuit comprise an ET sourcing/sinking circuit configured to generate the ET bias current based on the selected one of the negative signal and the positive signal.