Method of forming transistor with dual spacer
AssigneeUnited Microelectronics Corp.
InventorsChia-Ling Wang, Ping-Hung Chiang, Chang-Po Hsiung, Chia-Wen Lu, Nien-Chung Li, Wen-Fang Lee, Chih-Chung Wang
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AssigneeUnited Microelectronics Corp.
InventorsChia-Ling Wang, Ping-Hung Chiang, Chang-Po Hsiung, Chia-Wen Lu, Nien-Chung Li, Wen-Fang Lee, Chih-Chung Wang
Estimating the term…
A transistor with dual spacers includes a gate, a first dual spacer and a second inner spacer. The gate is disposed on a substrate, wherein the gate includes a gate dielectric layer and a gate electrode, and the gate dielectric layer protrudes from the gate electrode and covers the substrate. The first dual spacer is disposed on the gate dielectric layer beside the gate, wherein the first dual spacer includes a first inner spacer and a first outer spacer. The second inner spacer having an L-shaped profile is disposed on the gate dielectric layer beside the first dual spacer. The present invention also provides a method of forming said transistor with dual spacers.
A method of forming a transistor with dual spacers, comprising:
Dependencies are inferred from the claim text.