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US 10,475,901 B1Granted
Cap removal for gate electrode structures with reduced complexity
AssigneeGlobalfoundries Inc.
InventorsHans-Juergen Thees, Peter Baars
Life of this patent
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Abstract
The present disclosure relates to manufacturing techniques and respective semiconductor devices in which the capping material of gate electrode structures may be removed together with portions of the capping material of resistors on the basis of a highly controllable directional etch process, wherein raised drain and source regions may be protected on the basis of a fill material.
Claims20
A method, comprising:
- forming first and second active regions in a semiconductor layer;
- forming a fill material adjacent to and above a transistor element and adjacent to and above a non-transistor element, said transistor element comprising a first electrode structure that is formed above said first active region and is covered by a first capping material and raised drain and source regions that are formed adjacent to said first electrode structure, and said non-transistor element comprising a second electrode structure that is at least partially formed above said second active region and is covered by a second capping material;
- removing a first portion of said fill material so as to expose at least a top surface of said first and second capping materials while covering said raised drain and source regions;
- performing a removal process for both said first capping material and said second capping material so as to remove said first capping material from above said first electrode structure and to remove at least a first portion of said second capping material from above said second electrode structure;
- and
- removing a second portion of said fill material so as to expose a top surface of said raised drain and source regions.
3 more elements
A method of forming a semiconductor device, the method comprising:
- forming a transistor element in and on a semiconductor layer;
- said transistor element comprising a gate electrode structure that is covered by a capping material and laterally enclosed by sidewall spacer elements and raised drain and source regions that are formed adjacent to said gate electrode structure, said capping material having a top surface that is positioned at a first height level above said semiconductor layer;
- forming a fill material adjacent to said gate electrode structure, said fill material having an upper surface that is positioned at a second height level above said semiconductor layer that is lower than said first height level and that exposes said top surface and at least a portion of a sidewall surface of said capping material while covering said raked drain and source regions;
- and
- removing said capping material in the presence of said fill material by applying an anisotropic etch process, and thereafter removing a portion of said fill material so as to expose a top surface of said raised drain and source regions.
2 more elements
Dependencies are inferred from the claim text.