Reliable non-volatile memory device

A method for forming a device comprising:

• providing a substrate prepared with a memory region;
• forming at least a memory cell on the memory region, wherein forming the memory cell comprises
• forming a cell gate, the cell gate comprising an access gate disposed laterally adjacent to a storage gate, wherein a dielectric hard mask layer is disposed atop of the storage gate, and
• forming an erase gate laterally adjacent to the storage gate;
• forming a memory cell pair on the memory region prior to forming the erase gate, wherein the memory cell corresponds to a first memory cell of the memory cell pair and forming the memory cell pair comprises forming a second memory cell of the memory cell pair prior to forming the erase gate, wherein forming the second memory cell comprises forming a second cell gate having a second access gate laterally adjacent to a second storage gate, wherein a second dielectric hard mask layer is disposed atop of the second storage gate of the second cell gate, wherein the erase gate is formed interjacent the storage gates of the first and second memory cells;
• forming a silicide block on the erase gate, wherein the silicide block covers an exposed top surface of the erase gate;
• and
• forming metal silicide contacts on exposed silicon surface of the memory cell after forming the silicide block.

A method for forming a device comprising:

• providing a substrate prepared with a memory cell region;
• and
• forming a memory cell pair having first and second memory cells on the memory cell region, wherein forming the memory cell pair comprises
• forming a first cell gate of the first memory cell, and forming a second cell gate of the second memory cell, wherein each of the first and second cell gates comprises a split gate having an access gate laterally adjacent to a storage gate, and
• forming an erase gate interjacent the storage gates of the first and second memory cells, wherein the erase gate is separated from the storage gates by sidewall dielectric disposed on sidewalls of the storage gates;
• forming a silicide block on the erase gate, wherein the silicide block covers an exposed top surface of the erase gate, wherein the silicide block extends to overlap a portion of each of the first and second cell gates of the first and second memory cells, wherein the silicide block comprises openings in pick-up areas of the erase gate;
• and
• forming metal silicide contacts on exposed silicon surface of the first and second memory cells after forming the silicide block.