Resistive switching random access memory with asymmetric source and drain

A resistive random access memory (RRAM) cell, comprising:

• a resistive memory element formed on a semiconductor substrate;
• and
• a field effect transistor (FET) coupled with the resistive memory element, wherein the FET includes:
• a gate disposed on the semiconductor substrate;
• and
• a source and a drain formed in the semiconductor substrate and disposed on both sides of the gate, the source having a lower doping concentration than the drain;
• wherein the resistive memory element is coupled with the drain.

A method for making a resistive random access memory (RRAM) cell formed on a semiconductor substrate, the RRAM cell including a field effect transistor (FET) and a resistive memory element coupled together, the method comprising:

• performing a first ion implantation process with a first doping species to form a source of the FET in the semiconductor substrate, the source having a first doping concentration;
• performing a second ion implantation process with a second doping species to form a drain of the FET in the semiconductor substrate, wherein the drain has a second doping concentration that is greater than the first doping concentration;
• and
• forming a resistive memory element comprising a top electrode, a bottom electrode, and a resistive material layer between the top electrode and the bottom electrode;
• and
• forming a portion of an interconnect structure that electrically connects the resistive memory element to the drain of the FET.