Array substrate, display panel and display apparatus having the same, and fabricating method thereof
AssigneesBoe Technology Group Co., Ltd., Chongqing Boe Optoelectronics Technology Co., Ltd.
InventorsZhuo Xu, Yajie Bai, Xiaolin Wang, Rui Wang, Fei Shang, Haijun Qiu
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Abstract
The present application discloses an array substrate, a display panel and a display apparatus having the same, and a fabricating method thereof. The array substrate includes a base substrate; a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode; and a thin film transistor including an active layer, an etch stop layer on a side of the active layer distal to the base substrate, a first node, and a second node.
Claims20
An array substrate, comprising:
- a base substrate;
- a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode;
- a data line;
- and
- a thin film transistor comprising an active layer, an etch stop layer on a side of the active layer away from the base substrate, a first node, and a second node;
- wherein the active layer comprises a channel region, a first node contact region, and a second node contact region;
- a projection of the channel region on the base substrate substantially overlaps with that of the etch stop layer;
- a projection of the first node contact region and the second node contact region on the base substrate are outside that of the etch stop layer;
- the first node is on a side of the first node contact region away from the base substrate;
- and the second node is on a side of the second node contact region away from the base substrate;
- an orthographic projection of at least a first portion of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate;
- and
- the active layer and at least the first portion of the first electrode are in a same layer, and are made of a semiconductor material comprising M1OaNb, wherein M1 is a single metal or a combination of metals, a>0, and b≥0;
- wherein the data line comprises a first sub-layer and a second sub-layer;
- the first sub-layer on a side of the second sub-layer closer to the base substrate;
- the first sub-layer is in a same layer as the active layer and the first electrode, and is made of a same material as that of the active layer and the first electrode;
- and
- the second sub-layer is in a same layer as the first node and the second node, and is made of a same material as that of the first node and the second node.
An array substrate, comprising:
- a base substrate;
- a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode;
- and
- a thin film transistor comprising an active layer, an etch stop layer on a side of the active layer away from the base substrate, a first node, and a second node;
- wherein the active layer comprises a channel region, a first node contact region, and a second node contact region;
- a projection of the channel region on the base substrate substantially overlaps with that of the etch stop layer;
- a projection of the first node contact region and the second node contact region on the base substrate are outside that of the etch stop layer;
- the first node is on a side of the first node contact region away from the base substrate;
- and the second node is on a side of the second node contact region away from the base substrate;
- an orthographic projection of at least a first portion of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate;
- and
- the active layer and at least the first portion of the first electrode are in a same layer, and are made of a semiconductor material comprising M1OaNb, wherein M1 is a single metal or a combination of metals, a>0, and b≥0;
- wherein the second electrode is on a side of the first electrode closer to the base substrate.
An array substrate, comprising:
- a base substrate;
- a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode;
- and
- a thin film transistor comprising an active layer, an etch stop layer on a side of the active layer away from the base substrate, a first node, and a second node;
- wherein the active layer comprises a channel region, a first node contact region, and a second node contact region;
- a projection of the channel region on the base substrate substantially overlaps with that of the etch stop layer;
- a projection of the first node contact region and the second node contact region on the base substrate are outside that of the etch stop layer;
- the first node is on a side of the first node contact region away from the base substrate;
- and the second node is on a side of the second node contact region away from the base substrate;
- an orthographic projection of at least a first portion of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate;
- and
- the active layer and at least the first portion of the first electrode are in a same layer, and are made of a semiconductor material comprising M1OaNb, wherein M1 is a single metal or a combination of metals, a>0, and b≥0;
- wherein the first electrode is the pixel electrode and the second electrode is the common electrode;
- wherein the thin film transistor further comprises a gate electrode on the base substrate;
- wherein the array substrate further comprises:
- a common electrode signal line in a same layer as the gate electrode;
- and
- a gate insulating layer between the gate electrode and the active layer;
- wherein the common electrode is electrically connected to the common electrode signal line;
- wherein the common electrode is on a side of the gate insulating layer closer to the base substrate or on a side of a passivation layer away from the gate insulating layer.
An array substrate, comprising:
- a base substrate;
- a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode;
- and
- a thin film transistor comprising an active layer, an etch stop layer on a side of the active layer away from the base substrate, a first node, and a second node;
- wherein the active layer comprises a channel region, a first node contact region, and a second node contact region;
- a projection of the channel region on the base substrate substantially overlaps with that of the etch stop layer;
- a projection of the first node contact region and the second node contact region on the base substrate are outside that of the etch stop layer;
- the first node is on a side of the first node contact region away from the base substrate;
- and the second node is on a side of the second node contact region away from the base substrate;
- an orthographic projection of at least a first portion of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate;
- and
- the active layer and at least the first portion of the first electrode are in a same layer, and are made of a semiconductor material comprising M1OaNb, wherein M1 is a single metal or a combination of metals, a>0, and b≥0;
- wherein the first electrode is the common electrode and the second electrode is the pixel electrode.
A method of fabricating an array substrate, comprising:
- forming a first electrode and a second electrode on a base substrate, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode, wherein the second electrode is formed on a side of the first electrode closer to the base substrate;
- and
- forming a thin film transistor comprising an active layer, an etch stop layer on a side of the active layer away from the base substrate, a first node, and a second node;
- wherein the active layer is formed to have a channel region, a first node contact region, and a second node contact region;
- a projection of the channel region on the base substrate substantially overlaps with that of the etch stop layer;
- a projection of the first node contact region and the second node contact region on the base substrate are outside that of the etch stop layer;
- the first node is formed on a side of the first node contact region away from the base substrate;
- and the second node is formed on a side of the second node contact region away from the base substrate;
- the first electrode and the second electrode are formed so that an orthographic projection of at least a first portion of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate;
- and
- the active layer and at least the first portion of the first electrode are formed in a same layer, and are formed using a semiconductor material comprising M1OaNb, wherein M1 is a single metal or a combination of metals, a>0, and b≥0.
Dependencies are inferred from the claim text.