TFT array substrate, display device including the same, and method of manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorsByoung Kwon Choo, Joon Hwa Bae, Hyun Jin Cho, Jun Hyuk Cheon, Zi Yeon Yoon, Woo Jin Cho, Sung Hwan Choi, Jeong Hye Choi
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Abstract
A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
Claims23
A thin-film transistor (TFT) array substrate, comprising:
- a base substrate;
- a semiconductor layer disposed on the base substrate;
- an insulating layer disposed on the semiconductor layer;
- and
- a gate electrode disposed on the insulating layer,
- wherein a top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on a same level,
- the insulating layer covers the semiconductor layer, and
- a side surface of the gate electrode faces a side surface of the semiconductor layer.
A display device, comprising:
- a substrate;
- and
- a plurality of pixels arranged in an array on the substrate and including at least one TFT,
- wherein the TFT includes a semiconductor layer disposed on the substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer,
- a top surface of a portion of the insulating layer overlapping the semiconductor layer and a top surface of the gate electrode are placed on a same level,
- the insulating layer covers the semiconductor layer, and
- a side surface of the gate electrode faces a side surface of the semiconductor layer.
A method of manufacturing a TFT array substrate, comprising:
- forming a semiconductor layer on a base substrate;
- forming an insulating layer on the semiconductor layer;
- forming a gate electrode on the insulating layer;
- and
- forming a source electrode and a drain electrode on the insulating layer,
- wherein the forming of the gate electrode comprises depositing a gate electrode material layer on the insulating layer, forming a gate electrode pattern layer by patterning the gate electrode material layer, and polishing the gate electrode pattern layer through chemical mechanical polishing (CMP),
- the insulating layer covers the semiconductor layer, and
- a side surface of the gate electrode faces a side surface of the semiconductor layer.
A thin-film transistor (TFT) array substrate, comprising:
- a base substrate;
- a semiconductor layer disposed on the base substrate;
- an insulating layer disposed on the semiconductor layer;
- and
- a gate electrode disposed on the insulating layer,
- wherein the gate electrode and the semiconductor layer are disposed not to overlap each other in a plan view of the base substrate, and
- the gate electrode is disposed adjacent to the semiconductor layer and overlaps the semiconductor layer in a direction parallel to a top surface of the base substrate.
Dependencies are inferred from the claim text.