Memory device and method for fabricating the same

A method for fabricating a memory device, comprising:

• providing a multi-layers stack having a plurality of insulating layers, a plurality of conductive layers and at least one first through opening, wherein the insulating layers and the conductive layers are alternatively stacked with each other, and the first through opening passes though the conductive layers;
• forming a charge-trapping layer to blanket over a sidewall of the first through opening;
• forming a first channel layer in the first through opening, whereby a plurality of memory cells are defined on the intersection points of the charge-trapping layer, the first channel layer and the conductive layers;
• and
• forming a SSL switch on the multi-layers stack, wherein the SSL switch comprises:
• a second channel layer, disposed on and electrically connecting to the first channel layer;
• a gate dielectric layer, disposed on the second channel layer and made of a material other than that for making the charge-trapping layer;
• and
• a gate, disposed on the gate dielectric layer.