Semiconductor package and manufacturing method of the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsFeng-Cheng Hsu, Jui-Pin Hung, Shin-Puu Jeng
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Abstract
The present disclosure provides a semiconductor package, including a first semiconductor die layer having an active surface, a conductive contact electrically coupled to the active surface, a sidewall of the conductive contact being surrounded by an insulating layer, and a solder bump connected to the conductive contact. A seed layer is between the sidewall of the conductive contact and the insulating layer. The present disclosure provides a method for manufacturing a semiconductor package, the method including providing a carrier, forming an insulating layer over the carrier, debonding the carrier from the insulating layer, and exposing the conductive contact from the insulating layer by an etching operation.
Claims20
A semiconductor package, comprising:
- a first semiconductor die layer having a first surface and a second surface opposite to the first surface;
- a conductive contact electrically coupled to the first surface, a sidewall of the conductive contact being surrounded by an insulating layer disposed over the second surface of the first semiconductor die layer, a width of the conductive contact in proximity to the second surface being narrower than a width of the conductive contact in proximity to the first surface;
- and
- a solder bump connected to the conductive contact,
- wherein a seed layer is between the sidewall of the conductive contact and the insulating layer.
A semiconductor package, comprising:
- a first semiconductor die layer having an active surface;
- a conductive contact electrically coupled to the active surface, a sidewall of the conductive contact being surrounded by an insulating layer;
- and
- a solder bump connected to the conductive contact,
- wherein a seed layer is between the sidewall of the conductive contact and the insulating layer, and wherein the conductive contact further comprises a mesa protruding from the insulating layer and being connected to the solder bump.
A semiconductor package, comprising:
- a semiconductor die layer having an active surface;
- a through insulator via (TIV) electrically coupled to the active surface, the TIV comprising:
- a body surrounded by molding compound;
- and
- a mesa having a tapered sidewall over the body and surrounded by an insulating layer overlaying the molding compound;
- and
- a solder bump directly in contact with-the mesa of the TIV.
A semiconductor package, comprising:
- a semiconductor die having an active surface;
- a redistribution layer (RDL) electrically coupled to the active surface, the RDL comprising:
- a conductive line surrounded by a dielectric layer;
- and
- a conductive via surrounded by the dielectric layer, the conductive via comprising a tapered sidewall a horizontal surface, the horizontal surface being exposed from the dielectric layer;
- and
- a seed layer between the tapered sidewall and the dielectric layer.
Dependencies are inferred from the claim text.