Back to results
US 10,475,757 B2Granted
Package structure and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAlbert Wan, Chao-Wen Shih, Shou-Zen Chang, Nan-Chin Chuang
Life of this patent
Estimating the term…
Abstract
A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.
Claims20
A package structure, comprising:
- a molding compound having opposing first and second surfaces;
- at least one through interlayer via encapsulated in and penetrating through the molding compound;
- an antenna element at least partially molded in the molding compound and adjacent to the first surface of the molding compound, and electrically connected to the at least one through interlayer via;
- and
- a semiconductor die located on the second surface of the molding compound and electrically communicated to the antenna element via the at least one through interlayer via.
2 more elements
A package structure, comprising:
- a first molding compound and a second molding compound located on the first molding compound;
- a semiconductor die, molded in the first molding compound;
- and
- a through interlayer via wall, located on and electrically connected to the semiconductor die and having a frame shape with an inner surface and an outer surface facing to the inner surface, wherein the through interlayer via wall is molded in the second molding compound, and a cavity is located inside the through interlayer via wall and surrounds by the inner surface.
1 more element
A manufacturing method of a package structure, comprising:
- forming a first redistribution layer;
- forming through interlayer vias on the first redistribution layer, wherein the through interlayer vias are electrically connected to the first redistribution layer;
- encapsulating the through interlayer vias in a molding compound;
- disposing a semiconductor die on the first redistribution layer, wherein the semiconductor die is electrically connected to the first redistribution layer;
- and
- forming an antenna element having a first surface, a second surface opposite to the first surface and a sidewall connecting the first surface and the second surface, wherein the first surface and the sidewall of the antenna element are partially in contact with the molding compound, the second surface is free of the molding compound, and the antenna element is electrically connected to the semiconductor die through the first redistribution layer and the through interlayer vias.
3 more elements
Dependencies are inferred from the claim text.