Packaged semiconductor device with a particle roughened surface

#This disclosure relates to the field of packaged semiconductor devices. More particularly, this disclosure relates to packaged semiconductor devices with improved adhesion between the molding compound and lead frame.

#The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the disclosure. This summary is not an extensive overview of the disclosure, and is neither intended to identify key or critical elements of the disclosure, nor to delineate the scope thereof. Rather, the primary purpose of the summary is to present some concepts of the disclosure in a simplified form as a prelude to a more detailed description that is presented later.

#A packaged semiconductor device with a particle roughened surface on a portion of the lead frame with molding compound. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame with molding compound, with a reflow wall that surrounds a portion of a solder joint that couples the semiconductor device to the lead frame. The particle roughened surface may aid in adhesion between the molding compound and the lead frame.

#FIG. 1A is a cross-section of a packaged semiconductor device.

#FIG. 1B is a top view of the lead frame in the packaged semiconductor device in FIG. 1A.

#FIGS. 2A and 2B are cross-sections of packaged semiconductor devices with a lead frame, having a reflow wall and a particle roughened surface area.

#Embodiments of the disclosure are described with reference to the attached figures. The figures are not drawn to scale and they are provided merely to illustrate the disclosure. Several aspects of the embodiments are described below with reference to example applications for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide an understanding of the disclosure. One skilled in the relevant art, however, will readily recognize that the disclosure can be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations are not shown in detail to avoid obscuring the disclosure. The embodiments are not limited by the illustrated ordering of acts or events, as some acts may occur in different orders and/or concurrently with other acts or events. Furthermore, not all illustrated acts or events are required to implement a method.

#A packaged semiconductor device 100 is illustrated in the cross section in FIG. 1A. A semiconductor device 110 may be any semiconductor device, for example an integrated circuit, transistor, or diode. The semiconductor device 110 is attached to a lead frame 105 and covered with molding compound 112 to form the packaged semiconductor device 100. The semiconductor device package may be any package form, for example a dual in line package (DIP), a quad flat no lead (QFN) package or a flip chip small outline transistor (FCSOT) package or a radial package. A top view of the lead frame 105 in the packaged semiconductor device 100 is shown in FIG. 1B. The lead frame 105 is comprised of a number of leads 102 on which solder pads 104 are formed. The semiconductor device 110 is bonded to the lead frame 105 with solder joints 107 formed between metal posts 108 connected to input/output pads on the semiconductor device 110 and the solder pads 104. The number of leads 102 with solder pads 104 in a lead frame 105 may vary depending upon the number of solder joints 107 needed to mount the semiconductor device 110.

#Another embodiment directly connects the solder pads 104 of the lead frame to input/output pages on the semiconductor device.