Routable electroforming substrate comprising removable carrier
AssigneeAsm Technology Singapore Pte Ltd
InventorsTat Chi Chan, Yiu Fai Kwan, Gio Jose Asumo Villaespin, Yu Lung Lam, Hang Ren
Life of this patent
Estimating the term…
Abstract
A routable electroforming substrate for assembling a semiconductor package is manufactured by providing a carrier and plating a patterned first metallic layer onto the carrier which is configured to function as a surface mount pad or input/output pad in an assembled semiconductor package. A patterned second metallic layer comprising copper is plated over the first metallic layer, and a third metallic layer, which is configured for mounting a plurality of semiconductor dice, is plated over the second metallic layer. The carrier is then removed to expose the first metallic layer.
Claims15
Method of manufacturing a routable electroforming substrate for assembling a semiconductor package, comprising the steps of:
- providing a carrier;
- plating a patterned first metallic layer onto the carrier which is configured to function as a surface mount pad or input/output pad in an assembled semiconductor package;
- plating a patterned second metallic layer comprising copper over the first metallic layer;
- plating a third metallic layer over the second metallic layer which is configured for mounting a plurality of semiconductor dice onto the third metallic layer;
- and thereafter removing the carrier to expose the first metallic layer;
- wherein the step of removing the carrier is performed prior to mounting the semiconductor dice onto the third metallic layer.
Method of manufacturing a routable electroforming substrate for assembling a semiconductor package, comprising the steps of:
- providing a carrier;
- plating a patterned first metallic layer onto the carrier which is configured to function as a surface mount pad or input/output pad in an assembled semiconductor package;
- plating a patterned second metallic layer comprising copper over the first metallic layer;
- encapsulating the first and second metallic layers in a dielectric material, prior to plating a third metallic layer;
- plating the third metallic layer over the second metallic layer which is configured for mounting a plurality of semiconductor dice onto the third metallic layer;
- and thereafter
- removing the carrier to expose the first metallic layer.
Dependencies are inferred from the claim text.