Wrap-around contact plug and method manufacturing same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSung-Li Wang, Jyh-Cherng Sheu, Huang-Yi Huang, Chih-Wei Chang, Chi On Chui
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Abstract
A method includes forming a source/drain region, and in a vacuum chamber or a vacuum cluster system, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region. The method further includes selectively etching the metal layer in the vacuum chamber, and selectively forming a metal nitride layer on the metal silicide layer. The selectively forming the metal nitride layer is performed in the vacuum chamber or a vacuum cluster system without vacuum break.
Claims20
A method comprising:
- forming a source/drain region;
- in a vacuum chamber, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region, wherein the selective deposition is performed using a metal halide and hydrogen (H2) as process gases;
- selectively etching the metal layer in the vacuum chamber, wherein the selective etching is performed using the metal halide and hydrogen (H2) as process gases;
- and
- selectively forming a metal nitride layer on the metal silicide layer, wherein the selectively forming the metal nitride layer is performed in the vacuum chamber.
A method comprising:
- forming a gate stack over a first portion of a semiconductor fin;
- epitaxially growing a semiconductor material on a second portion of the semiconductor fin;
- forming a first Contact Etch Stop Layer (CESL) and a first inter-layer dielectric covering the semiconductor material;
- removing the first CESL and the first inter-layer dielectric;
- in a vacuum chamber, simultaneously forming a metal layer and a metal silicide layer, wherein the metal silicide layer is formed on the semiconductor material;
- without vacuum break, removing the metal layer;
- without vacuum break, forming a metal silicon nitride layer on the metal silicide layer;
- forming a second CESL covering the metal silicon nitride layer;
- and
- forming a second inter-layer dielectric over the second CESL.
A method comprising:
- forming a gate stack over a first portion of a semiconductor fin;
- epitaxially growing a semiconductor material on a second portion of the semiconductor fin;
- simultaneously forming a metal layer and a metal silicide layer using a process gas comprising a halide, with plasma being turned on, wherein the metal silicide layer is formed on the semiconductor material;
- removing the metal layer using the process gas, with plasma being turned off;
- and
- forming a metal nitride layer on the metal silicide layer using a third process gas.
Dependencies are inferred from the claim text.