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US 10,475,648 B1Granted
Method for patterning a semiconductor structure
AssigneesUnited Microelectronics Corp., Fujian Jinhua Integrated Circuit Co., Ltd.
InventorsLi-Wei Feng, Ming-Te Wei, Yu-Chieh Lin, Ying-Chiao Wang, Chien-Ting Ho
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Abstract
A method for patterning a semiconductor structure is provided, including forming an additional third material layer on a thinner portion of a second material layer to be an etching buffer layer. The removed thickness of the thinner portion of the second material layer covered by the third material layer during an etching back process is therefore reduced.
Claims10
A method for patterning a semiconductor structure, comprising:
- providing a substrate having an array region and a peripheral region;
- forming a hard mask layer on the substrate;
- forming a first material layer on the hard mask layer;
- patterning the first material layer to form a plurality of first material structures on the array region and completely remove the first material layer on the peripheral region;
- forming a sacrificial layer on sidewalls of the first material structures;
- forming a second material layer completely covering the array region and the peripheral region;
- forming a third material layer covering the second material layer on the peripheral region;
- performing an etching back process to remove a portion of the second material layer on the array region and at least a portion of the third material layer on the peripheral region until the sacrificial layer is exposed;
- removing the sacrificial layer to form a plurality of spaces between the second material layer and the first material structures;
- and
- etching the hard mask layer through the spaces to pattern the hard mask layer.
8 more elements
Dependencies are inferred from the claim text.