Shift register and driving method, gate driving circuit and display device

A display device, comprising a gate driving circuit and a display panel connected with the gate driving circuit,

• wherein the gate driving circuit comprises a shift register,
• the shift register comprises:
• a driving unit, configured to supply a gate line signal to a corresponding pixel unit group;
• and
• a compensation circuit provided corresponding to the driving unit,
• wherein the compensation circuit is configured to compensate for one or more threshold voltage offsets of one or more transistors in the driving unit,
• the compensation circuit comprises:
• a compensation transistor, a gate electrode of the compensation transistor being connected with a compensation control line, a first electrode of the compensation transistor being connected with a first compensation signal line, and a second electrode of the compensation transistor being connected with a pull-up node, and
• the compensation control line is used for supplying a control signal to the gate electrode of the compensation transistor for controlling turning on of the compensation transistor;
• and the first compensation signal line is used for supplying a positive compensation voltage or a negative compensation voltage to the first electrode of the compensation transistor, and
• the display device further comprises:
• a timing and temperature-measuring device, configured to measure an operation time and an operation temperature of a respective driving unit of the gate driving circuit when the display panel is operating, to obtain a threshold voltage offset state of a transistor in a pull-up circuit or a pull-down maintaining control circuit of the respective driving unit based on the measured operation time and operation temperature, and to calculate a compensation time period and a compensation voltage for the transistor according to the threshold voltage offset state;
• a control device, configured to store the compensation voltage and the compensation time period calculated by the timing and temperature-measuring device, and to supply the compensation voltage to the compensation circuit corresponding to the respective driving unit of the gate driving circuit;
• and
• a built-in power supply, configured to supply power to the compensation circuit of the gate driving circuit and the control device.

A driving method for driving a shift register, the shift register comprising:

• a driving unit, configured to supply a gate line signal to a corresponding pixel unit group;
• and
• a compensation circuit provided corresponding to the driving unit,
• wherein the compensation circuit is configured to compensate for one or more threshold voltage offsets of one or more transistors in the driving unit,
• the compensation circuit comprises:
• a compensation transistor, a gate electrode of the compensation transistor being connected with a compensation control line, a first electrode of the compensation transistor being connected with a first compensation signal line, and a second electrode of the compensation transistor being connected with a pull-up node, and
• the compensation control line is used for supplying a control signal to the gate electrode of the compensation transistor for controlling turning on of the compensation transistor;
• and the first compensation signal line is used for supplying a positive compensation voltage or a negative compensation voltage to the first electrode of the compensation transistor,
• the driving method comprising:
• in a charging phase, setting an input signal to a valid signal, setting a first clock signal to an invalid signal, setting a second clock signal to the valid signal, and setting a reset signal to an off voltage;
• in an outputting phase, setting the input signal to the invalid signal, setting the first clock signal to the valid signal, setting the second clock signal to the invalid signal, and setting the reset signal to the off voltage;
• in a discharging phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, and setting the reset signal to an on voltage;
• in a maintaining phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, and setting the reset signal to the off voltage;
• and
• in a compensation phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, setting the reset signal to the off voltage, setting a compensation control signal to the on voltage and setting the first compensation signal line to transmit the valid signal within a compensation time period, or setting the second compensation signal line to transmit the valid signal within the compensation time period.

A driving method for driving a shift register, the shift register comprising:

• a driving unit, configured to supply a gate line signal to a corresponding pixel unit group;
• and
• a compensation circuit provided corresponding to the driving unit,
• wherein the compensation circuit is configured to compensate for one or more threshold voltage offsets of one or more transistors in the driving unit;
• the compensation circuit comprises a first compensation transistor and a second compensation transistor, the first compensation transistor being an N-type transistor and the second compensation transistor being a P-type transistor;
• a gate electrode of the first compensation transistor is connected with a second compensation signal line and a first electrode of the first compensation transistor, and a second electrode of the first compensation transistor is connected with a pull-up node of the driving unit;
• a gate electrode of the second compensation transistor is connected with the second compensation signal line and a first electrode of the second compensation transistor, and a second electrode of the second compensation transistor is connected with the pull-up node of the driving unit;
• and
• the second compensation signal line is used for supplying a compensation voltage to the first electrode of the first compensation transistor or the first electrode of the second compensation transistor,
• the driving method comprising:
• in a charging phase, setting an input signal to a valid signal, setting a first clock signal to an invalid signal, setting a second clock signal to the valid signal, and setting a reset signal to an off voltage;
• in an outputting phase, setting the input signal to the invalid signal, setting the first clock signal to the valid signal, setting the second clock signal to the invalid signal, and setting the reset signal to the off voltage;
• in a discharging phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, and setting the reset signal to an on voltage;
• in a maintaining phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, and setting the reset signal to the off voltage;
• and
• in a compensation phase, setting the input signal to the invalid signal, setting the first clock signal to the invalid signal, setting the second clock signal to the invalid signal, setting the reset signal to the off voltage, setting a compensation control signal to the on voltage and setting the first compensation signal line to transmit the valid signal within a compensation time period, or setting the second compensation signal line to transmit the valid signal within the compensation time period.