Dependency handling for set-aside of compute control stream commands
AssigneeApple Inc.
InventorsAndrew M. Havlir, Jeffrey T. Brady
Life of this patent
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Abstract
Techniques are disclosed relating to managing dependencies in a compute control stream that specifies operations to be performed on a programmable shader (e.g., of a graphics unit). In some embodiments, the compute control stream includes commands and kernels. In some embodiments, dependency circuitry is configured to maintain dependencies such that younger kernels are allowed to execute ahead of a type of cache-related command (e.g., a command that signals a cache flush and/or invalidate). Disclosed circuitry may include separate buffers for commands and kernels, command dependency circuitry, and kernel dependency circuitry. In various embodiments, the disclosed architecture may improve performance in a highly scalable manner.
Claims20
An apparatus, comprising:
- programmable shader circuitry configured to perform compute operations based on a control stream that includes kernels and commands;
- command queue circuitry configured to store received commands from the control stream in program order;
- kernel queue circuitry configured to store received kernels from the control stream in program order;
- and
- kernel dependency circuitry that includes a set of dependency entries for each kernel in the kernel queue, wherein each set of dependency entries includes a dependency entry for each entry in the command queue, wherein the dependency entries each specify whether that kernel depends on that entry in the command queue;
- wherein the kernel dependency circuitry is configured to allow one or more kernels in the kernel queue to execute ahead of one or more commands of a first type of cache-related command that were earlier in program order.
A method, comprising:
- executing, by programmable shader circuitry, compute operations specified by a control stream that includes kernels and commands;
- storing, using a command queue, received commands from the control stream in program order;
- storing, using a kernel queue, received kernels from the control stream in program order;
- and
- storing, using kernel dependency circuitry that includes a set of dependency entries for each kernel in the kernel queue wherein each set of dependency entries includes a dependency entry for each entry in the command queue, information in one of the sets of dependency entries that specifies, for each entry in the command queue, whether that kernel depends on that entry in the command queue;
- and
- allowing, by the kernel dependency circuitry, one or more kernels in the kernel queue to execute ahead of one or more commands of a first type of cache-related command that were earlier in program order.
A non-transitory computer readable storage medium having stored thereon design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, including:
- programmable shader circuitry configured to perform compute operations based on a control stream that includes kernels and commands;
- command queue circuitry configured to store received commands from the control stream in program order;
- kernel queue circuitry configured to store received kernels from the control stream in program order;
- and
- kernel dependency circuitry that includes a set of dependency entries for each kernel in the kernel queue, wherein each set of dependency entries includes a dependency entry for each entry in the command queue, wherein the dependency entries each specify whether that kernel depends on that entry in the command queue;
- wherein the kernel dependency circuitry allows one or more kernels in the kernel queue to execute ahead of one or more commands of a first type of cache-related command that were earlier in program order.
Dependencies are inferred from the claim text.