Debug data saving in host memory on PCIE solid state drive
AssigneeWestern Digital Technologies, Inc.
InventorsMichael J. Anderson, Adam Michael Espeseth, Brandon William Schulz, Lee Anton Sendelbach
Life of this patent
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Abstract
A method, apparatus, and system are provided for implementing debug data saving in host memory on a Peripheral Component Interconnect Express (PCIE) solid state drive (SSD). Upon Power Loss Interruption (PLI) event detected in a solid state drive (SSD), the SSD transfers debug data directly to the host system main (DRAM) memory via a Peripheral Component Interconnect Express (PCIE) bus.
Claims20
A method for implementing debug data saving in host memory on a Peripheral Component Interconnect Express (PCIE) solid state drive (SSD) performed by the solid state drive (SSD) and host system, said method comprising:
- detecting a Power Loss Interruption (PLI) event in a solid state drive (SSD);
- responsive to the detected PLI event, generating a debug snapshot including specially formatted data with a header describing contents and length, and including memory ranges, internal variables, hardware register values, and event tracing information;
- and
- transferring said debug snapshot data directly to a host system main memory via a Peripheral Component Interconnect Express (PCIE) bus, responsive to the detected PLI event.
An apparatus for implementing debug data saving in host memory on a Peripheral Component Interconnect Express (PCIE) solid state drive (SSD) comprising:
- said solid state drive (SSD) including a controller detecting a Power Loss Interruption (PLI) event;
- said SSD, responsive to the detected PLI event, generating a debug snapshot including specially formatted data with a header describing contents and length, and including memory ranges, internal variables, hardware register values, and event tracing information;
- and
- said SSD transferring said debug snapshot data directly to a host system main memory via a Peripheral Component Interconnect Express (PCIE) bus, responsive to the detected PLI event.
A system for implementing debug data saving in host memory on a Peripheral Component Interconnect Express (PCIE) solid state drive (SSD) comprising:
- a host computer;
- a solid state drive (SSD);
- a Peripheral Component Interconnect Express (PCIE) bus connecting said host system and said solid state drive (SSD);
- said solid state drive (SSD) including a controller detecting a Power Loss Interruption (PLI) event;
- said SSD responsive to the detected PLI event, generating a debug snapshot including specially formatted data with a header describing contents and length, and including memory ranges, internal variables, hardware register values, and event tracing information;
- and
- said SSD transferring said debug snapshot data directly to a host system main memory via a Peripheral Component Interconnect Express (PCIE) bus, responsive to the detected PLI event.
Dependencies are inferred from the claim text.