Systems and methods for performing unknown address discovery in a MoChi space
AssigneeMarvell World Trade Ltd.
InventorJerry Hongming Zheng
Life of this patent
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Abstract
Systems, methods, and apparatuses are disclosed herein for discovering unknown chips and chip components of a MoChi system. To this end, a first System-on-Chip (“SoC”) may transmit a first discovery packet from a downlink MoChi port the first SoC to an uplink MoChi port of a second SoC. The first SoC may receive, at the downlink MoChi port of the first SoC, from the uplink MoChi port of the second SoC, a first reply packet. The first SoC may determine whether the reply packet indicates that the second SoC is a known SoC or an unknown SoC. In response to determining that the second SoC is an unknown SoC, the first SoC may assign a first address mask to the first SoC that identifies that the second SoC can be reached by way of the first SoC.
Claims20
A method for discovering components of a modular chip system, the method comprising:
- transmitting a first discovery packet from a downlink modular chip port of a first System-on-Chip (SoC) to respective uplink modular chip ports of a plurality of SoCs comprising a known SoC and an unknown SoC, wherein the downlink modular chip port of the known SoC comprises an enter value stored in an address field, and wherein the enter value indicates a global address of the downlink modular chip port;
- receiving, at the downlink modular chip port of the first SoC, from each of the uplink modular chip ports of the known SoC and the unknown SoC, a respective reply packet;
- determining whether a received reply packet from a second SoC of the plurality of SoCs indicates that the second SoC is the known SoC or the unknown SoC;
- in response to determining that the second SoC is the unknown SoC, assigning a first address mask to the first SoC that identifies that the second SoC can be reached by way of the first SoC.
A system for discovering components of a modular chip system, the system comprising:
- a first System-on-Chip (SoC) comprising a downlink modular chip port;
- and
- a plurality of SoCs each comprising an uplink modular chip port, the plurality of SoCs comprising a known SoC and an unknown SoC, wherein a downlink modular chip port of the known SoC comprises an enter value stored in an address field, and wherein the enter value indicates a global address of the downlink modular chip port;
- and
- wherein the first SoC comprises control circuitry configured to:
- transmit a first discovery packet from the downlink modular chip port of the first SoC to the uplink modular chip ports of each of the plurality of SoCs;
- receive, at the downlink modular chip port of the first SoC, from each of the uplink modular chip ports of the plurality of SoCs, a respective reply packet;
- determine whether a received reply packet from a second SoC of the plurality of SoCs indicates that the second SoC is the known SoC or the unknown SoC;
- and
- in response to determining that the second SoC is the unknown SoC, assign a first address mask to the first SoC that identifies that the second SoC can be reached by way of the first SoC.
Dependencies are inferred from the claim text.