Information processing device including nonvolatile cache memory and processor
AssigneeToshiba Memory Corporation
InventorShinichi Kanno
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a cache memory device includes a nonvolatile cache memory, write unit, determination unit, selection unit, and erase unit. The nonvolatile cache memory includes a plurality of erase unit areas. Each of the erase unit areas includes a plurality of write unit areas. The write unit writes data to the nonvolatile cache memory. The determination unit determines whether the plurality of erase unit areas satisfy an erase condition or not. The selection unit selects an area to be erased from the plurality of erase unit areas when the plurality of erase unit areas satisfy the erase condition. The erase unit erases the data written to the area to be erased.
Claims16
An information processing device comprising:
- a nonvolatile cache memory comprising a first group including a plurality of first erase unit areas, a second group including a plurality of second erase unit areas and a third group including a plurality of third erase unit areas, each of the first to third erase unit areas including a plurality of write unit areas, and data of each of the first to third erase unit areas being collectively erased per erase unit area by executing erase processing on each of the first to third erase unit areas;
- and
- a processor configured to control the nonvolatile cache memory, communicate with an external memory system, and execute cache control for the nonvolatile cache memory having access speed higher than access speed of a nonvolatile memory device included in the external memory system, wherein the processor, in the cache control, is configured to:
- write data into the first group;
- generate management information including states of uses of data written in the first to third groups;
- generate deletion information indicating whether or not the data written in the first to third groups are deletion target data, the deletion target data being a candidate of data to be deleted which is indicated by a program executed by the processor;
- determine whether the first group satisfies a first erase condition or not;
- select a first area to be erased from the first group if the first group satisfies the first erase condition;
- determine, on the basis of the management information and the deletion information, whether first data written in the first area is in a first use state and whether the first data is the deletion target data;
- write the first data into the second group if the first data is determined to be in the first use state and not to be the deletion target data;
- write the first data into the third group if the first data is determined not to be in the first use state and not to be the deletion target data;
- execute the erase processing on the first area in which the first data is written;
- determine whether the second group satisfies a second erase condition or not;
- select a second area to be erased from the second group if the second group satisfies the second erase condition;
- determine, on the basis of the management information and the deletion information, whether second data written in the second area is in a second use state and whether the second data is the deletion target data;
- write the second data into the third group if the second data is determined not to be in the second use state and not to be the deletion target data;
- and
- execute the erase processing on the second area in which the second data is written.
Dependencies are inferred from the claim text.