Multi-bit data representation framework to enable dual program operation on solid-state flash devices

A system comprising:

• a processor configured to transmit a first write command and at least a second write command to an erasure-based, non-volatile memory device, wherein the first and second write commands each include unique unencoded data;
• and
• the erasure-based, non-volatile memory device is configured to perform, to a single target physical memory address, the first and at least the second write commands without an intervening erase operation,
• wherein the erasure-based, non-volatile memory device comprises:
• an internal processor to:
• convert each of the unencoded data to respective at least first encoded data and second encoded data, wherein the first and second encoded data each include different bit patterns than the unencoded data, and
• update, as part of performing each write command, a rewritable state associated with the target physical memory address, and
• a non-volatile memory to:
• store, in response to the first write command and at the target physical memory address, the first encoded data by flipping bits in a unidirectional fashion,
• refrain from performing an erase operation to the target physical memory address, and
• store, in response to the second write command and at the target physical memory address, the second encoded data.

An apparatus comprising:

• an internal processor to:
• receive a first write command that includes a first unencoded data,
• determine a target memory address to store the information included in the first unencoded data,
• convert the first unencoded data to a first encoded data, wherein the encoded data includes a different bit pattern than the unencoded data,
• store the first encoded data in an erasure-based memory at the target memory address,
• receive a second write command that includes a second unencoded data,
• convert the second unencoded data to a second encoded data,
• without performing an erase operation on the target memory address, store the second encoded data in the erasure-based memory at the target memory address;
• and
• the erasure-based memory to:
• store data by flipping bits in a unidirectional fashion, and
• erase stored data by resetting all of the bits at a memory address to a predetermined state from which the bits may be flipped in the unidirectional fashion.