Built-in self test for A/D converter

A method, comprising:

• determining, at a first time, an idle state in analog-to-digital conversion performed by an analog-to-digital converter during normal operation;
• determining a test time for a built-in self-test operation of the analog-to-digital converter in response to the idle state in the analog-to-digital conversion;
• determining an idle time of the idle state in the analog-to-digital conversion performed by the analog-to-digital converter;
• initiating the built-in self-test operation of the analog-to-digital converter in response to the idle time at least equaling the test time;
• providing built-in self-test test data to the analog-to-digital converter in response to the initiating of the built-in self-test operation;
• analyzing a test result produced by the analog-to-digital converter based on the test data;
• determining at a second time, a second idle state in analog-to-digital conversion performed by an analog-to-digital converter during normal operation;
• initiating a second built-in self-test operation to test the analog-to-digital converter during the second idle state;
• and
• interrupting the second built-in self-test operation, prior to completing the second built-in self-test operation, in response to a resumption of an analog-to-digital conversion performed by the analog-to-digital converter during normal operation.

A device, comprising:

• an analog-to-digital converter at a substrate;
• built-in self-test state detection circuitry at the substrate configured to determine an idle state in analog-to-digital conversion performed by the analog-to-digital converter during normal operation;
• a built-in self-test controller circuitry configured to initiate a built-in self-test operation by the device of the analog-to-digital converter in response to the built-in self-test detection circuitry determining the occurrence of the idle state;
• a built-in self-test signal generator circuitry configured to provide an analog test signal to the analog-to-digital converter in response to the built-in self-test controller circuitry initiating the built-in self-test operation;
• a built-in self-test performance circuitry configured to analyze a test result produced by the analog-to-digital converter
• wherein the built-in self-test controller circuitry is further configured to interrupt the built-in self-test operation, prior to completing the built-in self-test operation, in response to a resumption of an analog-to-digital conversion performed by the analog-to-digital converter during normal operation.