Hardware and software debug using data dependency tracing

A data processing system comprising:

• a system memory;
• a hardware unit configured to perform first and second operations, wherein the first operation comprises a first plurality of system memory accesses comprising a first read instruction of data read from the system memory and a first write instruction of data written to the system memory, wherein the second operation comprises a second plurality of system memory accesses comprising a second read instruction of data read from the system memory and a second write instruction of data written to the system memory;
• a general purpose processor configured to perform a software unit operation that comprises a third plurality of system memory accesses comprising a third read instruction of data read from the system memory and a third write instruction of data written to the system memory;
• a debug data memory, wherein the debug data memory is configured to record information pertaining to (1) each of the first, second, and third read instructions and (2) each of the first, second, and third write instructions in separate memory information blocks;
• and
• interconnect circuitry interconnecting the general purpose processor, the system memory, the hardware unit, and the debug data memory, wherein the hardware unit is configured to provide onto the interconnect circuitry with each of the first and second plurality of system memory accesses (1) separate identifications for each of the first and second operations, and (2) values identifying first and last system memory accesses performed by each of the first and second operations.

A method for facilitating debugging of operations performed by a hardware unit and a software unit that are included in a data processing system that includes a system memory, wherein a first operation performed by the hardware unit comprises a first plurality of instructions that read data from the system memory, perform a first computation, and write a result of the first computation to the system memory, wherein a second operation performed by the software unit comprises a second plurality of instructions that read data from the system memory, perform a second computation, and write a result of the second computation to the system memory, the method comprising:

• recording information pertaining to each of the first plurality of instructions performed by the hardware unit in separate memory information blocks within a debug data memory;
• recording information pertaining to each of the second plurality of instructions in separate memory information blocks within the debug data memory;
• creating a first linked relationship between first and second ones of the separate memory information blocks, wherein the first one of the separate memory information blocks represents a read instruction of data from the system memory by the hardware unit, and wherein the second one of the separate memory information blocks represents a write instruction of data to the system memory by the hardware unit after the hardware unit has processed the data read from the system memory;
• creating a second linked relationship between third and fourth ones of the separate memory information blocks, wherein the third one of the separate memory information blocks represents a read instruction of data from the system memory by the software unit, and wherein the fourth one of the separate memory information blocks represents a write instruction of data to the system memory by the software unit after the software unit has processed the data read from the system memory;
• and
• creating a third linked relationship between fifth and sixth ones of the separate memory information blocks, wherein the fifth one of the separate memory information blocks represents a first exchange of specific data between the system memory and the hardware unit, and wherein the sixth one of the separate memory information blocks represents a second exchange of the specific data between the system memory and the software unit.