Apparatus and method of improved permute instructions

A method comprising:

• decoding a packed permute quadword instruction into a decoded, packed permute quadword instruction, the packed permute quadword instruction including a vector extension component and an immediate, the vector extension component comprising:
• a first byte field to indicate a format of the packed permute quadword instruction,
• a second byte field to identify one or more vector registers, the vector registers including a source vector register and a destination vector register, the second byte field to further identify a corresponding opcode map for the packed permute quadword instruction, and
• a third byte field to indicate a packed data element length and to specify a portion of an opcode encoding corresponding to the packed permute quadword instruction;
• and
• executing the decoded, packed permute quadword instruction to responsively select, for each data element position within the destination vector register, a particular one of packed quadword data elements from the source vector register based on an index value in the immediate, a separate index value associated with each of the data elements positions in the destination vector register,
• wherein each index value has a number of bits sufficient to identify one of the packed quadword data elements stored in the source vector register and wherein the particular one of the packed quadword data elements is any one of the packed quadword data elements.

A non-transitory machine-readable medium storing program code which, when executed by a machine, causes the machine to perform operations of:

• decoding a packed permute quadword instruction into a decoded, packed permute quadword instruction, the packed permute quadword instruction including a vector extension component and an immediate, the vector extension component comprising:
• a first byte field to indicate a format of the packed permute quadword instruction,
• a second byte field to identify one or more vector registers, the vector registers including a source vector register and a destination vector register, the second byte field to further identify a corresponding opcode map for the packed permute quadword instruction, and
• a third byte field to indicate a packed data element length and to specify a portion of an opcode encoding corresponding to the packed permute quadword instruction;
• and
• executing the decoded, packed permute quadword instruction to responsively select, for each data element position within the destination vector register, a particular one of packed quadword data elements from the source vector register based on an index value in the immediate, a separate index value associated with each of the data elements positions in the destination vector register,
• wherein each index value has a number of bits sufficient to identify one of the packed quadword data elements stored in the source vector register and wherein the particular one of the packed quadword data elements is any one of the packed quadword data elements.