Method and system for mitigating the effect of write and read disturbances in solid state memory regions

A storage appliance, comprising:

• a storage module comprising solid state memory and a storage module controller,
• wherein the storage module controller is configured to:
• receive a request to write to a memory location of the solid state memory;
• write to the memory location in response to the request;
• identify a disturbed memory location based on a weight, wherein the weight specifies a degree to which at least the disturbed memory location is affected by performing the write to the memory location, wherein the disturbed memory location stores an ambiguous state following the write to the memory location;
• identify a memory region that comprises the disturbed memory location;
• identify an address, in the memory region, of the disturbed memory location;
• generate, using a hash function, an address hash from the address;
• obtain, for the memory region, a history of disturbed memory locations comprising a set of bits;
• mapping the address hash to a bit of the set of bits;
• make a first determination, based on an inspection of the bit, that the history of disturbed memory locations for the memory region comprises the address hash, and based on the first determination:
• clear the history of disturbed memory locations;
• and
• make a second determination that a wear level operation is due, and based on the second determination:
• perform the wear level to restore the disturbed memory location to a desired state, wherein the desired state corresponds to the state of the disturbed memory location prior to the write to the memory location.

A non-transitory computer readable medium (CRM) comprising instructions, which when executed by a storage module controller, enable the storage module controller to:

• receive a request to write to a memory location of the solid state memory;
• write to the memory location in response to the request;
• identify a disturbed memory location based on a weight, wherein the weight specifies a degree to which at least the disturbed memory location is affected by performing the write to the memory location, wherein the disturbed memory location stores an ambiguous state following the write to the memory location;
• identify a memory region that comprises the disturbed memory location;
• identify an address, in the memory region, of the disturbed memory location;
• generate, using a hash function, an address hash from the address;
• obtain, for the memory region, a history of disturbed memory locations comprising a set of bits;
• mapping the address hash to a bit of the set of bits;
• make a first determination, based on an inspection of the bit, that the history of disturbed memory locations for the memory region comprises the address hash, and based on the first determination:
• clear the history of disturbed memory locations;
• make a second determination that a wear level operation is due, and based on the second determination:
• perform the wear level operation to restore the disturbed memory location to a desired state, wherein the desired state corresponds to the state of the disturbed memory location prior to the write to the memory location.