Systems, methods and devices for using thermal margin of a core in a processor
AssigneeIntel Corporation
InventorsDaniel G. Cartagena, Corey D. Gough, Vivek Garg, Nikhil Gupta
Life of this patent
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Abstract
A dynamic adjustment of core power can reduce thermal margin between thermal design power (TDP) and an allowable thermal load. For example, by focusing directly on the core temperatures explicitly, a per-core closed loop temperature controller (pCLTC) can remove conservatism induced by the power level 1 policy (PL1, a policy which defines frequency and/or power for the processor under sustained load) thereby allowing for increased processor performance when there exists margin in the thermal system.
Claims21
An apparatus for estimating dynamic power in an integrated chip, comprising:
- a measurement interface configured to receive temperature measurements for a plurality of cores;
- a power interface configured to provide a p-state for each core from a set of cores;
- and
- one or more processors configured to:
- for each core from the set of cores:
- measure a temperature of the core;
- determine an allowable thermal load;
- determine a temperature dependent leakage;
- calculate available power based at least in part on an activity ratio, the temperature dependent leakage and total power available;
- determine a p-state voltage based at least in part on the available power;
- and
- select the p-state for the core.
A processor system for dynamically adjusting power within a thermal budget comprising:
- a central processing unit comprising a set of cores;
- a set of temperature sensors coupled to the set of cores;
- a power interface configured to provide a p-state to each core from the set of cores;
- storage for a model of thermal dynamics between power provided to a core and core temperature;
- and
- one or more processors configured to:
- determine a controller output for each core based at least in part on the model;
- calculate an estimate of temperature dependent leakage for each core;
- calculate an estimate of activity to power ratio for each core based at least in part on an average of previous samples;
- calculate an associated p-state voltage for each core for a remaining dynamic power based at least in part on an activity ratio;
- and
- select the p-state associated with the associated p-state voltage for each core.
A computer program product comprising a non-transitory computer-readable storage medium storing program code for causing one or more processors to perform a method, the method comprising:
- measuring a temperature of a plurality of cores in a central processing unit (CPU);
- determining a thermal margin of a core between actual temperature and thermal design power temperature;
- estimating temperature dependent leakage for a core based on voltage and measured temperature;
- determining available power based on the thermal margin and temperature dependent leakage;
- determining an associated p-state voltage for an available power and core demand;
- and
- updating a core p-state with the associated p-state voltage.
Dependencies are inferred from the claim text.