PAM-4 voltage-mode driver with stabilized output
AssigneeMarvell International Ltd.
InventorsPeng Liu, Zhendong Guo
Life of this patent
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Abstract
Linearity of a PAM-4 voltage-mode driver is improved using current compensation. The driver receives a first input data signal having a first logic level and a second input data signal having a second logic level. In an additive current mode, when the first logic level matches the second logic level, the driver uses switch circuitry to form an auxiliary current path through which supplementary current (I_Supplementary) flows from a voltage regulator. In a primary current mode, when the first logic level does not match the second logic level, the driver uses the switch circuitry to break the auxiliary current path, thereby preventing the supplementary current (I_Supplementary) from flowing from the voltage regulator.
Claims20
A pulse amplitude modulated-4 (PAM-4) voltage-mode driver in which a resistance of a primary current path of the driver varies as a function of respective logic levels of digital data that is input to the driver, the voltage-mode driver comprising:
- switch circuitry that is coupled to a first input data port and a second input data port and that is responsive to respective binary logic levels of a first input data signal input to the first input data port and a second input data signal input to the second input data port, the switch circuitry being configured to:
- in response to the first logic level matching the second logic level, cause supplementary current (I_Supplementary) to flow from a voltage regulator through the auxiliary current path in an additive current mode, and
- in response to the first logic level not matching the second logic level, prevent the supplementary current (I_Supplementary) from flowing from the voltage regulator through the auxiliary current path in a primary current mode.
A method for using current compensation to improve the linearity of a pulse amplitude modulated-4 (PAM-4) voltage-mode driver, in which a resistance of a primary current path of the driver varies as a function of respective logic levels of digital data that is input to the driver, the method comprising:
- receiving, at a first input data port of PAM-4 driver circuitry, a first input data signal having a first logic level;
- receiving, at a second input data port of the driver circuitry, a second input data signal having a second logic level;
- in an additive current mode, in response to the first logic level matching the second logic level, using switch circuitry to form an auxiliary current path, thereby causing supplementary current (I_Supplementary) to flow from the voltage regulator through the auxiliary current path;
- and
- in a primary current mode, in response to the first logic level not matching the second logic level, using the switch circuitry to break the auxiliary current path, thereby preventing the supplementary current (I_Supplementary) from flowing from the voltage regulator through the auxiliary current path.
Dependencies are inferred from the claim text.