# US 10,455,494 B2 · Methods and systems relating to ultra wideband broadcasting

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- Number: US 10,455,494 B2
- Document ID: US10455494B2
- Status: Granted
- Kind: B2
- Application number: 16/254,809
- Filed: 2019-01-23
- Published: 2019-05-23
- Granted: 2019-10-22
- Earliest claimed: 2014-01-09
- Assignees: Transfert Plus, Societe en Commandite
- Applicants: Transfert Plus Societe En Commandite
- Inventors: Frederic Nabki; Dominic Deslandes; Alexandre Desmarais; Anh-Kiet Vuong; Anis Bounif; Wang Yu Hao; William Pham
- Web page: https://patentgrep.com/patent/US10455494B2

## CPC

- H04W 52/02: Power saving arrangements
- G03B 21/00: Projectors or projection-type viewers; Accessories therefor (devices for changing pictures G03B23/00)
- G03B 21/26: Projecting separately subsidiary matter simultaneously with main image
- G06F 1/163: {Wearable computers, e.g. on a belt}
- G06F 3/017: {Gesture based interaction, e.g. based on a set of recognized hand gestures (interaction based on gestures traced on a digitiser G06F3/04883)}
- G06F 3/0304: {Detection arrangements using opto-electronic means (constructional details of pointing devices not related to the detection arrangement using opto-electronic means G06F3/033; optical digitisers G06F3/042)}
- G06F 3/0346: with detection of the device orientation or free movement in a three-dimensional [3D] space, e.g. 3D mice, 6-DOF [six degrees of freedom] pointers using gyroscopes, accelerometers or tilt-sensors
- G06F 3/041: Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F 3/042: by opto-electronic means
- G06F 3/0425: {using a single imaging device like a video camera for tracking the absolute position of a single or a plurality of objects with respect to an imaged reference surface, e.g. video camera imaging a display or a projection screen, a table or a wall surface, on which a computer generated image is displayed or projected (tracking a projected light spot to determine a position on a display surface G06F3/0386)}
- G06F 3/0426: {tracking fingers with respect to a virtual keyboard projected or printed on the surface (virtual keyboards on touch screens G06F3/04886)}
- G06F 3/048: Interaction techniques based on graphical user interfaces [GUI]
- G06F 3/0482: Interaction with lists of selectable items, e.g. menus
- G06F 3/04845: for image manipulation, e.g. dragging, rotation, expansion or change of colour
- G06F 3/0488: using a touch-screen or digitiser, e.g. input of commands through traced gestures
- H04B 1/0458: {Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H)}
- H04B 1/403: using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
- H04B 1/662: {using a time/frequency relationship, e.g. time compression or expansion}
- H04B 1/713: using frequency hopping
- H04B 1/71632: {Signal aspects (H04B1/7172 and H04B1/7176 take precedence)}
- H04B 1/71635: {Transmitter aspects (H04B1/7174 takes precedence)}
- H04B 1/7172: {Pulse shape (in general H04L25/03834)}
- H04B 5/48: Transceivers
- H04N 9/3194: {including sensor feedback}
- G06F 3/04886: by partitioning the display area of the touch-screen or the surface of the digitising tablet into independently controllable areas, e.g. virtual keyboards or menus
- H04B 5/24: Inductive coupling
- H04B 2001/0416: {having gain or transmission power control}
- H04B 2001/0433: {with linearisation using feedback}
- Y02D 30/70: in wireless communication networks
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)
- G03B: APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR (optical parts of such apparatus G02B; photosensitive materials or processes for photographic purposes G03C; apparatus for processing exposed photographic materials G03D)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04B: TRANSMISSION
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Within many applications impulse radio based ultra-wideband (IR-UWB) transmission offers significant benefits for very short range high data rate communications when compared with existing standards and protocols. In many of these applications the main design goals are very low power consumption and very low complexity design for easy integration and cost reduction. Digitally programmable IR-UWB transmitters using an on-off keying modulation scheme on a 0.13 microns CMOS process operating on 1.2V supply and yielding power consumption as low as 0.9 mW at a 10 Mbps data rate with dynamic power control are enabled. The IR-UWB transmitters support new frequency hopping techniques providing more efficient spectrum usage and dynamic allocation of the spectrum when transmitting in highly congested frequency bands. Biphasic scrambling is also introduced for spectral line reduction. Additionally, an energy detection receiver for IR-UWB is presented to similarly meet these design goals while being adaptable to address IR-UWB transmitter specificity.

## Claims

### Claim 1

A receiver circuit supporting operation as an impulse radio receiver having dynamic configuration comprising:
a front end amplification circuit for amplifying received radio frequency (RF) signals from an antenna;
a squaring circuit electrically coupled to the front end amplification circuit for receiving amplified RF signals;
an integration circuit electrically coupled to an output of the squaring circuit;
an N-bit flash analog-to-digital converter (ADC) electrically coupled to the integration circuit and generating N multiple output signals;
wherein N is a positive integer and N≥2;
a single-ended input to dual-ended output sub-circuit disposed between the front end amplification circuit and squaring circuit to generate a pair of amplified differential signals from an output of the front end amplification circuit which are coupled to the squaring circuit; and
a dual-ended input to single-ended output sub-circuit disposed between output of the squaring circuit and the integration circuit to recover a single-sided output signal from the squaring circuit;
wherein the front end amplification circuit comprises:
a low noise amplifier matched to the antenna for receiving the RF signals from the antenna;
a first amplifier for receiving an output of the low noise amplifier and comprising a plurality of stages;
the squaring circuit comprises a balanced mixer receiving the differential signals from the single-ended to dual-end sub-circuit comprising a modified unloaded double balanced Gilbert cell with a current steering sub-circuit; and
the output of the squaring circuit is established in dependence upon the current steering sub-circuit.

### Claim 2 (depends on 1)

The receiver circuit according to claim 1, wherein
at least one of:
N=3; and
an end-value of the N-bit flash ADC is clocked into a series of flip-flops on an ending edge of an integration window signal provided by a control circuit also forming part of the receiver circuit; and
the N-bit flash ADC power cycled between readings.

### Claim 3 (depends on 1)

The receiver circuit according to claim 1, wherein the current steering sub-circuit generates an output voltage as the output of the squaring circuit which is first function of a squared signal within the balanced mixer through the steering sub-circuit creating a load which is a second function of the squared signal and a current difference within the current steering sub-circuit which is a third function of the squared signal; and
an output frequency of electrical signals from the squaring circuit is less than double that of the received RF signals from the front end amplification circuit.

### Claim 4 (depends on 1)

The receiver circuit according to claim 1, wherein
an integrated reference voltage of the N-bit flash ADC is adjusted in dependence upon a measurement of integrated noise power; and
the measurement of integrated noise power is established integrating during a time where no data is being received.

### Claim 5 (depends on 4)

The receiver circuit according to claim 4, wherein
the time where no data is being received is during receipt of a training sequence received by the receiver; and
the training sequence allows the receiver to establish synchronization with a transmitter transmitting the training sequence.

### Claim 6 (depends on 1)

The receiver circuit according to claim 1, wherein the integration circuit integrates over an integration window; and
a sensitivity of the integration circuit is varied in dependence upon a length of the integration window.

### Claim 7 (depends on 1)

The receiver circuit according to claim 1, further comprising
a power cycling control circuit for powering up and down predetermined portions of the receiver in a predetermined order; wherein
timing information for the power cycling control circuit is established in dependence upon synchronization of the receiver to a transmitter; and
synchronization of the receiver with the transmitter is established in dependence upon the receiver receiving a training sequence transmitted by the transmitter.

### Claim 8 (depends on 7)

The receiver circuit according to claim 7, wherein
the power cycling control circuit employs a non-overlapping clock generator to generate all power cycling control signals applied to the front end amplification circuit, squaring circuit, integration circuit and N-bit flash ADC; and
the non-overlapping clock generator generates the power cycling control signals and an integration window over which the N-bit flash ADC integrates from a single template waveform.

### Claim 9 (depends on 1)

The receiver circuit according to claim 1, further comprising
a power cycling control circuit for powering up and down predetermined portions of the receiver in a predetermined order; wherein
a subset of components within the receiver are decoupled and biased independently through a biasing resistor;
each biasing resistor has a parallel transistor; and
each parallel transistor is opened briefly by a control signal pulse provided by the power cycling control circuit in order to create a low impedance path to a voltage source for the biasing resistor associated with the parallel transistor in order to reduce settling time during powering up of a portion of the receiver circuit comprising a component of the subset of components associated with the biasing resistor and parallel transistor.

### Claim 10 (depends on 9)

The receiver circuit according to claim 9, wherein
the control signal pulse applied to each parallel transistor is generated by a power up signal associated with the portion of the receiver circuit comprising the component of the subset of components to which the parallel transistor is associated.

### Claim 11

A method of receiving data comprising:
receiving a plurality of bits of data with an antenna receiving wireless signals transmitted by an impulse radio ultra-wideband transmitter, each bit of data of the plurality of bits of data encoded according to a pulse based encoding scheme of a plurality of pulse based encoding schemes comprising a plurality of pulses with frequency and/or bandwidth hopping and a predetermined emitted power spectrum density profile, and
processing the received plurality of bits with a radio frequency (RF) receiver comprising at least an energy detection circuit; wherein
sequential bits of data of the plurality of bits of data employ either the same pulse based encoding scheme of the plurality of pulse based encoding schemes or a different pulse based encoding scheme of the plurality of pulse based encoding schemes;
wherein the radio frequency (RF) receiver further comprises:
a front end amplification circuit which amplifies for receiving amplified RF signals;
and a single-ended input to dual-ended output sub-circuit disposed between the front end amplification circuit and energy detection circuit to generate a pair of amplified differential signals from an output of the front end amplification circuit which are coupled to the energy detection circuit; and
the energy detection circuit comprises:
a squaring circuit electrically coupled to the front end amplification circuit;
a dual-ended input to single-ended output sub-circuit coupled to the squaring circuit to recover a single-sided output signal from the squaring circuit;
an integration circuit electrically coupled to the single-end output of the dual-ended input to single-ended output sub-circuit; and
an N-bit flash analog-to-digital converter (ADC) electrically coupled to the integration circuit and generating N multiple output signals;
wherein the squaring circuit comprises a balanced mixer receiving the differential signals from the single-ended to dual-end sub-circuit comprising a modified unloaded double balanced Gilbert cell with a current steering sub-circuit; and
the output of the squaring circuit is established in dependence upon the current steering sub-circuit.

### Claim 12 (depends on 11)

The method according to claim 11, wherein
at least one of:
the plurality of pulses vary in at least one of pulse width and pulse amplitude as well as in frequency and/or bandwidth; and
the plurality of pulses comprises a plurality N pulses at a pulse repetition rate established in dependence upon a frequency of clock signal of the impulse radio ultra-wideband transmitter wherein each pulse of the N pulses is at a predetermined frequency of a plurality M frequencies, has a predetermined amplitude, and has a predetermined pulse length; wherein
N≥2;
M≥2;
M and N are integers;
the integer N depends upon a duration of the bit being encoded and transmitted by the impulse radio ultra-wideband transmitter and the pulse repetition rate; and
the plurality N pulses are transmitted within the duration of the bit of the data.

### Claim 13 (depends on 11)

The method according to claim 11, wherein
an integrated reference voltage for the N-bit flash ADC is adjusted in dependence upon a measurement of integrated noise power which is established by integrating during a time where no data is being received.

### Claim 14 (depends on 11)

The method according to claim 11, wherein
the RF receiver also comprises a power cycling control circuit for powering up and down predetermined portions of the receiver in a predetermined order where timing information for the power cycling control circuit is established in dependence upon synchronization of the receiver to the impulse radio ultra-wideband transmitter through receipt of a training sequence by the RF receiver from the impulse radio ultra-wideband transmitter.

### Claim 15 (depends on 11)

The method according to claim 11, wherein the integration circuit integrates over an integration window and a sensitivity of the integration circuit is varied in dependence upon a length of the integration window.

### Claim 16 (depends on 11)

The method according to claim 11, wherein
the RF receiver also comprises a power cycling control circuit for powering up and down predetermined portions of the receiver in a predetermined order where each predetermined portion of the RF receiver comprises a component which is decoupled and biased independently through a biasing resistor in parallel with a transistor to a voltage source, where each transistor is opened briefly by a control signal pulse provided by the power cycling control circuit in order to create a low impedance path to a voltage source for the biasing resistor in order to reduce settling time during powering up of that portion of the RF receiver.
