# US 10,455,174 B2 · Imaging device and electronic appliance > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,455,174 B2 - Document ID: US10455174B2 - Status: Granted - Kind: B2 - Application number: 15/842,938 - Filed: 2017-12-15 - Published: 2018-06-28 - Granted: 2019-10-22 - Earliest claimed: 2017-12-15 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Takayuki Ikeda - Web page: https://patentgrep.com/patent/US10455174B2 ## CPC - H04N 25/709: Circuitry for control of the power supply - H10F 39/80: {Constructional details of image sensors} - H04N 25/532: by controlling global shutters in CMOS SSIS - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/778: comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/6743: {Silicon} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 30/6758: {characterised by the insulating substrates} - H10F 39/8037: {the integrated elements comprising a transistor} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An imaging device that operates at high speed is provided. The imaging device includes an imaging circuit, two or more image processing blocks, and two or more selectors. The image processing blocks each include an image processing unit and a retention circuit, and the selectors each include a switch unit and a retention circuit. The imaging circuit has a function of generating image data by performing imaging operation. The image processing unit has a function of processing the image data generated by the imaging circuit. The retention circuit included in the image processing block has a function of receiving and retaining a parameter that is necessary for the image processing unit to perform processing. The switch unit has a function of outputting the image data generated by the imaging circuit or the image data processed by the image processing unit. The retention circuit included in the selector has a function of receiving and retaining a parameter that is output from the switch unit. The first retention circuit and the second retention circuit each include a transistor including a metal oxide in a channel formation region. ## Claims ### Claim 1 An imaging device comprising: an imaging circuit; a first controller; a plurality of circuits including a first circuit and a second circuit; and a plurality of selectors including a first selector and a second selector, wherein each of the plurality of circuits includes an image processing unit and a first retention circuit, wherein each of the plurality of selectors includes a switch unit and a second retention circuit, wherein the first retention circuit includes a first transistor, wherein the second retention circuit includes a second transistor, wherein the imaging circuit is configured to generate image data by performing imaging operation, wherein the first controller is configured to control power supply to the plurality of circuits, wherein the image processing unit of the first circuit is configured to process image data that has been generated by the imaging circuit, wherein the image processing unit of the first circuit is configured to process image data that has been processed by the image processing unit of the second circuit, wherein the first retention circuit of the first circuit is configured to receive a first parameter, wherein the first retention circuit of the first circuit is configured to retain the first parameter while power supply to the first circuit is interrupted, wherein the switch unit of the first selector is configured to output the image data selected from the image data that has been generated by the imaging circuit and the image data that has been processed by the image processing unit of the first circuit or the second circuit, wherein the second retention circuit of the first selector is configured to receive a second parameter, wherein the second retention circuit of the first selector is configured to retain the second parameter while power supply to the first selector is interrupted, and wherein the first transistor and the second transistor each include a metal oxide in a channel formation region. ### Claim 2 (depends on 1) The imaging device according to claim 1, wherein the first parameter indicates information that is necessary for the image processing unit to perform processing, and wherein the second parameter indicates image data that is output from the switch unit. ### Claim 3 (depends on 1) The imaging device according to claim 1, wherein the first retention circuit includes a first register and a second register, wherein the second retention circuit includes a third register and a fourth register, wherein the first register is configured to supply the first parameter to the second register, wherein the second register is configured to output the first parameter, which has been received from the first register, to the image processing unit, wherein the third register is configured to supply the second parameter to the fourth register, and wherein the fourth register is configured to output the second parameter, which has been received from the third register, to the switch unit. ### Claim 4 (depends on 3) The imaging device according to claim 3, wherein the second register includes the first transistor, wherein the fourth register includes the second transistor, wherein the second register of the first circuit is configured to retain the first parameter while power supply to the first circuit is interrupted, and wherein the fourth register of the first selector is configured to retain the second parameter while power supply to the first selector is interrupted. ### Claim 5 (depends on 3) The imaging device according to claim 3, wherein the first register and the third register each include a flip-flop circuit. ### Claim 6 (depends on 1) The imaging device according to claim 1, wherein the plurality of circuits are n (n is an integer of 2 or more) circuits and the plurality of selectors are (n+1) selectors. ### Claim 7 (depends on 1) The imaging device according to claim 1, wherein the first retention circuit includes a first capacitor, wherein the second retention circuit includes a second capacitor, wherein a source or a drain of the first transistor is electrically connected to the first capacitor, and wherein a source or a drain of the second transistor is electrically connected to the second capacitor. ### Claim 8 (depends on 1) The imaging device according to claim 1, further comprising a second controller, wherein the second controller controls power supply to the imaging circuit and the first controller. ### Claim 9 (depends on 1) The imaging device according to claim 1, further comprising a host, wherein the host is configured to generate the first parameter and the second parameter. ### Claim 10 (depends on 9) The imaging device according to claim 9, wherein the first controller is configured to receive the first parameter that has been generated by the host, wherein the first controller is configured to receive the second parameter that has been generated by the host, wherein the first controller is configured to supply the received first parameter to the first circuit, and wherein the first controller is configured to supply the received second parameter to the first selector. ### Claim 11 (depends on 1) An electronic appliance comprising: the imaging device according to claim 1; and an operation button. ### Claim 12 An imaging device comprising: an imaging circuit; a first controller; a plurality of circuits including a first circuit and a second circuit; and a plurality of selectors including a first selector and a second selector, wherein each of the plurality of circuits includes an image processing unit and a first retention circuit, wherein each of the plurality of selectors includes a switch unit and a second retention circuit, wherein the first retention circuit includes a first transistor, wherein the second retention circuit includes a second transistor, wherein the imaging circuit is configured to generate image data by performing imaging operation, wherein the first controller is configured to control power supply to the plurality of circuits, wherein the image processing unit of the first circuit is configured to process image data that has been generated by the imaging circuit, wherein the image processing unit of the first circuit is configured to process image data that has been processed by the image processing unit of the second circuit, wherein the first retention circuit of the first circuit is configured to receive a first parameter, wherein the first retention circuit of the first circuit is configured to retain the first parameter while power supply to the first circuit is interrupted, wherein the switch unit of the first selector is configured to output the image data selected from the image data that has been generated by the imaging circuit and the image data that has been processed by the image processing unit of the first circuit or the second circuit, wherein the second retention circuit of the first selector is configured to receive a second parameter, and wherein the second retention circuit of the first selector is configured to retain the second parameter while power supply to the first selector is interrupted. ### Claim 13 (depends on 12) The imaging device according to claim 12, wherein the first parameter indicates information that is necessary for the image processing unit to perform processing, and wherein the second parameter indicates image data that is output from the switch unit. ### Claim 14 (depends on 12) The imaging device according to claim 12, wherein the first retention circuit includes a first register and a second register, wherein the second retention circuit includes a third register and a fourth register, wherein the first register is configured to supply the first parameter to the second register, wherein the second register is configured to output the first parameter, which has been received from the first register, to the image processing unit, wherein the third register is configured to supply the second parameter to the fourth register, and wherein the fourth register is configured to output the second parameter, which has been received from the third register, to the switch unit. ### Claim 15 (depends on 14) The imaging device according to claim 14, wherein the second register includes the first transistor, wherein the fourth register includes the second transistor, wherein the second register of the first circuit is configured to retain the first parameter while power supply to the first circuit is interrupted, and wherein the fourth register of the first selector is configured to retain the second parameter while power supply to the first selector is interrupted. ### Claim 16 (depends on 14) The imaging device according to claim 14, wherein the first register and the third register each include a flip-flop circuit. ### Claim 17 (depends on 12) The imaging device according to claim 12, wherein the plurality of circuits are n (n is an integer of 2 or more) circuits and the plurality of selectors are (n+1) selectors. ### Claim 18 (depends on 12) The imaging device according to claim 12, wherein the first retention circuit includes a first capacitor, wherein the second retention circuit includes a second capacitor, wherein a source or a drain of the first transistor is electrically connected to the first capacitor, and wherein a source or a drain of the second transistor is electrically connected to the second capacitor. ### Claim 19 (depends on 12) The imaging device according to claim 12 further comprising a second controller, wherein the second controller controls power supply to the imaging circuit and the first controller. ### Claim 20 (depends on 12) An electronic appliance comprising: the imaging device according to claim 12; and an operation button.