Multilayer printed circuit board via hole registration and accuracy

A method of making accurate multilayer printed circuit hole to conductive feature geometry, comprising:

• drilling a first hole in a first core, the first hole having a first diameter;
• filling and/or plating the first hole with a first electrically conductive material;
• forming a circuit pattern on one or two conductive layers of the first core;
• forming a second core including a first pre-drilled via hole filled and/or plated with a second electrically conductive material;
• combining the first core and the second core to form a multilayer structure with the first hole of the first core misaligned with the first pre-drilled via hole of the second core;
• drilling a second hole within the first hole and the first pre-drilled via hole, the second hole having a second diameter where the second diameter is smaller than the first diameter;
• and
• plating a third electrically conductive material to an inner surface of the second hole to form a plated through hole extending through the first core and the second core, wherein a plating thickness of the conductive material plated to the inner surface of the second hole is at least 10 micron (0.0004″).