Semiconductor device

A semiconductor device comprising:

• a first differential amplifying unit that includes a first pair of P-channel differential transistors in which one and the other of differential input signals are applied to the respective gates and the voltage of a first node changed in accordance with the voltage range of the differential input signals is applied to each source, and that amplifies the differential input signals in the case where the differential input signals indicate a first voltage range;
• a second differential amplifying unit that includes a second pair of P-channel differential transistors in which one and the other of the differential input signals are applied to the respective gates and the voltage of the first node is applied to each source, and that amplifies the differential input signals in the case where the differential input signals indicate a second voltage range higher than the first voltage range;
• a first protection unit that conducts between each source and each drain of the first and second pairs of differential transistors in the case where the differential input signals indicate a third voltage range higher than the first and second voltage ranges;
• a third differential amplifying unit that includes a third pair of N-channel differential transistors in which one and the other of the differential input signals are applied to the respective gates and the voltage of a second node changed in accordance with the voltage range of the differential input signals is applied to each source, and that amplifies the differential input signals in the case where the differential input signals indicate a fourth voltage range;
• a fourth differential amplifying unit that includes a fourth pair of N-channel differential transistors in which one and the other of the differential input signals are applied to the respective gates and the voltage of the second node is applied to each source, and that amplifies the differential input signals in the case where the differential input signals indicate a fifth voltage range lower than the fourth voltage range;
• a second protection unit that conducts between each source and each drain of the third and fourth pairs of differential transistors in the case where the differential input signals indicate a sixth voltage range lower than the fourth and fifth voltage ranges;
• and
• a synthesis circuit that generates differential output signals by synthesizing amplification results obtained by the first to fourth differential amplifying units.