Methods for constructing lookup tables for division and square-root implementations

A method, comprising:

• receiving, by a processor circuit, an input operand for an iterative arithmetic operation, wherein the input operand is expressed in a binary representation that includes a fractional part having non-overlapping first, second, and third portions;
• retrieving, by a control circuit included in the processor circuit, a first value from a first lookup table using the first and second portions, wherein the first value is indicative of a first portion of an initial estimate of the iterative arithmetic operation;
• and
• retrieving, by the control circuit, a second value from a second lookup table using the second portion, but not the first and third portions, wherein the second value is indicative of second portion of the initial estimate of the iterative arithmetic operation;
• multiplying, by a multiplier circuit included in the processor circuit, the second value and the third portion of the input operand to generated a first intermediate value;
• adding, by an adder and truncation circuit included in the processor circuit, the first value and the first intermediate value to generate a second intermediate value;
• truncating, by the adder and truncation circuit, the second intermediate value to generate an initial approximation of the iterative arithmetic operation;
• and
• performing, by the processor circuit, the iterative arithmetic operation using the initial approximation and the input operand.

An apparatus, comprising:

• a memory circuit;
• a processor circuit coupled to the memory circuit and configured to perform an iterative arithmetic operation based on an input operand and an initial approximation of a result of the iterative arithmetic operation, wherein the input operand is expressed in a binary representation that includes a fractional part having non-overlapping first, second, and third portions, and wherein the processor circuit includes:
• a first lookup table including a first plurality of values that includes a particular value indicative of a first portion of an initial estimate of the result of the iterative arithmetic operation;
• a second lookup table including a second plurality of values that includes a different value indicative of a second portion of the initial estimate of the result of the iterative arithmetic operation;
• a control circuit configured to:
• retrieve a first value from the first lookup table using the first and second portions of the input operand;
• retrieve a second value from the second lookup table using the second portion, but not the first and third portions;
• a multiplier circuit configured to generate a product of the second value and the third portion of the input operand;
• and
• an adder and truncation circuit configured to:
• generate a sum of the first value and the product;
• and
• truncate the sum to generate the initial approximation.