Module auto addressing in platform bus

A method for addressing modules on a platform bus comprising:

• obtaining a master module on a platform bus;
• adding one or more slave modules on the platform bus;
• and
• running an identification signal line through the modules via the sub-base connectors;
• and
• wherein:
• the platform bus is a wire network that runs through sub-base connectors that interlock the modules together;
• addressing of the modules occurs automatically in that the master module has a first address by default, and a first slave module adjoining the master module is assigned a second address, wherein the addressing of the modules is automatically performed by an algorithm at boot time of the base module;
• a second slave module nearest to the first slave module, if there is a second slave module, is assigned a third address;
• each of the other slave modules, nearest to a preceding slave module assigned an address, is assigned a next address after an address assigned to the preceding slave module;
• the master module puts virtually all of the slave modules into an addressing mode by broadcasting a first message on the platform bus, wherein the first message includes a first proprietary frame message that distinguishes the first message from normal traffic data;
• and
• after each of virtually all of the slave modules on the platform bus has an assigned address, the master module directs all of the slave modules to leave the address mode by broadcasting a second message on the platform bus, wherein the second message includes a second proprietary frame message that distinguishes the second message from normal traffic data.

A module system having addressing comprising:

• a bus;
• a master module on the bus;
• and
• one or more slave modules on the bus;
• and
• wherein:
• the master module comprises a processor;
• an algorithm for assigning unique addresses to the modules is automatically performed at the processor at boot-time of the master module;
• wherein the algorithm instructs the master module to put the one or more slave modules into an addressing mode by broadcasting a first message on the bus, wherein the first message includes a first proprietary frame message that distinguishes the first message from normal traffic data;
• and
• after each of virtually of the one or more slave modules has an assigned address, the master module directs the one or more slave modules to leave the address mode by broadcasting a second message on the bus, wherein the second message includes a second proprietary frame message that distinguishes the second message from normal traffic data.