Attenuator device in a radio frequency transmission stage

A transmission device comprising:

• a transmit stage configured to deliver a transmission signal on an input-output node of an antenna and comprising a power transistor coupled to the input-output node and configured to amplify a signal to be transmitted, and
• a receive stage configured to receive a reception signal on the input-output node and comprising an attenuator circuit for attenuating the reception signal, wherein the attenuator circuit comprises the power transistor and a control circuit configured to place the power transistor in a triode mode, wherein the control circuit comprises:
• a first circuit comprising a current-generating stage, a first node, a second node, and a third node;
• a model resistive circuit coupled between the first node of the first circuit and a reference terminal configured to receive a reference voltage, wherein the current-generating stage is configured to make a first current flow in the model resistive circuit;
• a first benchmark transistor coupled between a second node of the first circuit and the reference terminal, wherein the third node of the first circuit is coupled to a gate of the first benchmark transistor and to a gate of the power transistor and wherein the current-generating stage is further configured to make a second current flow in the first benchmark transistor;
• and
• an instruction generator configured to generate at least one digital control signal configured to adjust a control voltage at the third node to a value which places the power transistor in the triode mode at a desired resistive value.

A circuit comprising:

• a power transistor having
• a gate coupled to a first circuit via a first switch;
• a first load-path terminal coupled to a reference terminal, and
• a second load-path terminal coupled to a first node, the first node coupled to a second circuit, the power transistor configured to produce an amplified signal at the first node;
• and
• a control circuit coupled to the gate of the power transistor, the control circuit configured to place the power transistor in a triode mode when the first switch is open, wherein the power transistor is configured to attenuate a second signal received at the first node.