Gate cut method

A method of forming a semiconductor structure, comprising:

• forming a sacrificial gate over a plurality of semiconductor fins;
• forming an interlayer dielectric laterally adjacent to the sacrificial gate;
• forming a hard mask over the sacrificial gate and over the interlayer dielectric;
• etching an opening in the hard mark to expose a top surface of the sacrificial gate and form a recessed region within the interlayer dielectric;
• forming an oxide layer on at least the top surface of the sacrificial gate, a top surface of the interlayer dielectric within the recessed region, and a sidewall surface of the hard mask within the opening;
• removing a portion of the oxide layer to expose the top surface of the sacrificial gate, wherein a remaining portion of the oxide layer is positioned over the top surface of the interlayer dielectric;
• and
• etching the sacrificial gate to form a gate cut opening that extends through the sacrificial gate, wherein the gate cut opening is located between an adjacent pair of the fins in the plurality of semiconductor fins.