Method of etching microelectronic mechanical system features in a silicon wafer

A method of etching one or more features in a silicon wafer, the method comprising:

• coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer;
• removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer;
• etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to a target depth plane located between the top surface and the bottom surface of the silicon wafer at a target depth from the top surface;
• coating the bottom surface and the one or more bottom surface features etched into the bottom surface with a metallic coating;
• and
• etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to the target depth plane.

A method of etching one or more through-features into a silicon wafer comprising a top surface and a bottom surface and coated in a mask layer, wherein the one or more through-features comprise one or more nozzle through-holes, an outlet plenum, and a cooling fluid outlet, the method comprising:

• forming a mask pattern in a mask layer top surface and a mask layer bottom surface of the mask layer;
• etching a bottom portion of the one or more nozzle through-holes from the bottom surface to a nozzle target depth through the mask layer bottom surface;
• etching the cooling fluid outlet from the bottom surface to a plenum target depth through the mask layer top surface;
• coating the bottom surface and the bottom portion of the one or more nozzle through-holes and the cooling fluid outlet with a metallic coating;
• etching a top portion of the one or more nozzle through-holes from the top surface to the nozzle target depth;
• and
• etching the outlet plenum from the top surface to the plenum target depth, wherein:
• the first of the one or more through-features to etch through the silicon wafer is completed at an initial through-etch time, and
• the last of the one or more through-features to etch through the silicon wafer is completed at an etch completion time.