Apparatus and methods for power efficient CMOS and BiCMOS transmitters suitable for wireless applications

A silicon-based transmitter, comprising:

• a reconfigurable linear power amplifier (PA) having a plurality of PA sections, wherein the plurality of PA sections comprises discrete transistor arrays that can be turned OFF or ON according to a magnitude of an input signal;
• a digital signal processor with an algorithm to process the input signal to obtain a control signal that drives the plurality of PA sections and maintains an overall transmitter power gain constant over an entire input signal range;
• a set of ON-OFF switchable drivers that control a power of the plurality of PA sections according to the control signal;
• an impedance matching network equipped with a bank of capacitors to reduce PA output impedance variations due to turning ON or OFF of the plurality of PA sections;
• a common-mode feedback (CMFB) mechanism configured to reduce common-mode variations and glitches at an output of the PA due to turning ON or OFF of the plurality of PA sections;
• and
• a capacitive matching engine comprising a set of compensating capacitors configured to maintain a substantially constant output node capacitance.