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US 10,387,122 B1Granted
Residue number matrix multiplier
AssigneeOlsen IP Reserve, LLC
InventorEric B. Olsen
Life of this patent
Estimating the term…
Abstract
Arithmetic circuits and methods that perform efficient matrix multiplication for hardware acceleration of neural networks, machine learning, web search and other applications are disclosed herein. Various arrays of multiplier-accumulators may be coupled to form a matrix multiplier which processes data using high precision, fixed point residue number arithmetic.
Claims6
A residue number matrix multiplier comprising:
- a plurality of digit processing elements, each of the digit processing elements comprising a modular accumulator having one or more registers;
- wherein the modular accumulator operates in a modular accumulator mode for an initial accumulation, and operates in a binary accumulator mode for a final accumulation.
A residue number matrix multiplier comprising:
- a plurality of digit processing elements, each of the digit processing elements comprising a modular accumulator associated with a modulus and responsive to a control input, wherein:
- the modular accumulator operates in a modular accumulation mode for an initial accumulation responsive to assertion of a control input;
- the modular accumulator operates in a binary accumulation mode for a final accumulation responsive to de-assertion of a control input and;
- at least a subset of the modulus are unique;
- wherein said modular accumulation is transferred from the modular accumulator to an output register before overflow of the modular accumulator.
2 more elements
Dependencies are inferred from the claim text.