Multi-layer circuit structure and manufacturing method thereof

A method of manufacturing a multi-layer circuit structure, comprising:

• forming a first circuit structure and a second circuit structure on two opposite surfaces of a core layer respectively, the first circuit structure and the second circuit structure being electrically connected to each other;
• forming a first dielectric layer on the first circuit structure;
• forming a plurality of first conductive blind holes in the first dielectric layer and allowing the first conductive blind holes to electrically contact the first circuit structure, wherein a top surface of each of the first conductive blind holes is coplanar with a top surface of the first dielectric layer;
• forming a second dielectric layer on the first dielectric layer, wherein the top surface of each of the first conductive blind holes is coplanar with a bottom surface of the second dielectric layer, and there are only the plurality of first conductive blind holes between the first dielectric layer and the second dielectric layer, wherein each of the first conductive blind holes comprises:
• a first conductive layer;
• and
• a seed layer, wherein a top surface of the seed layer, a top surface of the first conductive layer, the top surface of the first dielectric layer, and the bottom surface of the second dielectric layer are coplanar, wherein the bottom surface of the second dielectric layer directly and only contacts the top surface of the seed layer, the top surface of the first conductive layer, and the top surface of the first dielectric layer;
• forming a plurality of second conductive blind holes in the second dielectric layer and allowing the second conductive blind holes to electrically contact the first conductive blind holes respectively;
• and
• forming a patterned circuit layer on the second dielectric layer and allowing the patterned circuit layer to electrically contact the second conductive blind holes.