Memory controller with adjustable impedance for output terminal
AssigneeRealtek Semiconductor Corp.
InventorsShih-Hung Wang, Shen-Kuo Huang, Gerchih Chou, Wen-Shan Wang
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AssigneeRealtek Semiconductor Corp.
InventorsShih-Hung Wang, Shen-Kuo Huang, Gerchih Chou, Wen-Shan Wang
Estimating the term…
A memory controller adjusts impedance matching of an output terminal and outputs a control signal that controls a memory through the output terminal. The memory controller includes a first driving and impedance matching circuit, a second driving and impedance matching circuit, and a logic circuit. The logic circuit, which is coupled to the first driving and impedance matching circuit and the second driving and impedance matching circuit, sets a first impedance and a first driving capability of the first driving and impedance matching circuit, sets a second impedance and a second driving capability of the second driving and impedance matching circuit, and enables the first driving and impedance matching circuit to cause the control signal to have a first level or enables the second driving and impedance matching circuit to cause the control signal to have a second level different from the first level.
A memory controller for adjusting impedance matching of an output terminal and outputting a control signal for controlling a memory through the output terminal, the memory controller comprising:
A memory controller for adjusting impedance matching of an output terminal and outputting a control signal for controlling a memory through the output terminal, the memory controller comprising:
Dependencies are inferred from the claim text.