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US 10,382,041 B2Granted
Buffer circuit
AssigneeSK hynix Inc.
InventorGi Moon Hong
Life of this patent
Estimating the term…
Abstract
A buffer circuit may include an input unit coupled among first and second output nodes and a common node. The input unit may be configured to change voltage levels of first and second output nodes based on an input signal. The buffer circuit may generate an output signal swinging between a voltage and a first voltage in a first operation mode, and may generate an output signal swinging between the voltage and a second voltage having a different level from the first voltage in a second operation mode.
Claims32
A buffer circuit comprising:
- an input unit configured to electrically couple a first output node and a second output node to a common node based on an input signal,
- wherein the buffer circuit is configured to provide a high voltage to one of the first and second output nodes based on the input signal in a first operation mode, and configured to provide a first low voltage to the common node in the first operation mode, and
- wherein the buffer circuit is configured to provide the high voltage to both of the first and second output nodes in a second operation mode, and configured to provide a second low voltage having a different level from the first low voltage to the common node in the second operation mode.
A buffer circuit comprising:
- an input unit electrically coupled between a first output node, a second output node, and a common node, and configured to change voltage levels of the first and second output nodes based on an input signal,
- wherein the buffer circuit is configured to provide a first high voltage to the common node in a first operation mode, and configured to provide a low voltage to one of the first and second output nodes based on the input signal in the first operation mode, and
- wherein the buffer circuit is configured to provide a second high voltage having a different level from the first high voltage to the common node in a second operation mode, and configured to provide the low voltage to both of the first and second output nodes in the second operation mode.
A buffer circuit comprising:
- an input unit electrically coupled between a first output node, a second output node, and a common node, and configured to change voltage levels of the first and second output nodes based on an input signal;
- a gating unit configured to provide a high voltage to the first and second output nodes based on a first operation mode signal and the input signal;
- a first low voltage supply unit configured to provide a first low voltage to the common node based on the first operation mode signal;
- and
- a second low voltage supply unit configured to provide a second low voltage having a different level from the first low voltage to the common node based on a second operation mode signal and a bias voltage.
2 more elements
A buffer circuit comprising:
- an input unit electrically coupled between first and second common nodes, and configured to change voltage levels of first and second output nodes based on an input signal;
- a first high voltage supply unit configured to provide the first high voltage to the first common node in a first operation mode;
- and
- a second high voltage supply unit configured to generate the second high voltage from the first power voltage and to provide the second high voltage to the first common node in a second operation mode,
- wherein the second high voltage supply unit includes a voltage limit element configured to generate the second high voltage from the first power voltage based on a bias voltage, and a supply element configured to provide the second high voltage to the first common node in the second operation mode.
2 more elements
Dependencies are inferred from the claim text.