High voltage level shifting (HVLS) circuit and related semiconductor devices

A high voltage level shifting (HVLS) circuit, comprising:

• a level conversion circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor, with the first and the second transistors having a first conductivity type and the third and the fourth transistors having a second conductivity type, wherein the level conversion circuit converts an input signal having a first high voltage to an output signal having a second high voltage that is higher than the first high voltage, and wherein the first transistor is connected to the third transistor at a first connection node, the second transistor is connected to the fourth transistor at a second connection node, and a control node of the first transistor is connected to a control node of the second transistor;
• a first switch having a first node connected to a first power source and a second node connected to the control node of the first transistor;
• a second switch having a first node connected to the control node of the first transistor and a second node connected to the first connection node;
• and
• a switch control circuit connected to the first switch and the second switch, and controls the first switch and the second switch not to be close at the same time,
• wherein the switch control circuit comprises:
• a first inverter having an input node connected to the second connection node and an output node connected to a control node of the first switch;
• and
• a second inverter having an input node connected to the output node of the first inverter and an output node connected to a control node of the second switch.

A high voltage level shifting (HVLS) circuit, comprising:

• a level conversion circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor, with the first and the second transistors having a first conductivity type and the third and the fourth transistors having a second conductivity type, wherein the level conversion circuit converts an input signal having a first high voltage to an output signal having a second high voltage that is higher than the first high voltage, and wherein the first transistor is connected to the third transistor at a first connection node, the second transistor is connected to the fourth transistor at a second connection node, and a control node of the first transistor is connected to a control node of the second transistor;
• a first switch having a first node connected to a first power source and a second node connected to the control node of the first transistor;
• a second switch having a first node connected to the control node of the first transistor and a second node connected to the first connection node;
• a switch control circuit connected to the first switch and the second switch, and controls the first switch and the second switch not to be close at the same time;
• and
• a regulator circuit connected to the level conversion circuit, wherein the regulator circuit regulates the output signal of the level conversion circuit,
• wherein the switch control circuit comprises:
• a first inverter having an input node connected to the second connection node and an output node connected to a control node of the first switch;
• and
• a second inverter having an input node connected to the output node of the first inverter and an output node connected to a control node of the second switch.